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File indexing completed on 2021-02-14 12:47:22

0001 #ifndef TP_PIXELFEDCARD_H
0002 #define TP_PIXELFEDCARD_H
0003 /**
0004 *   \file CalibFormats/SiPixelObjects/interface/PixelFEDCard.h
0005 *   \brief This class implements..
0006 *
0007 *   A longer explanation will be placed here later
0008 */
0009 
0010 #include "CalibFormats/SiPixelObjects/interface/PixelConfigBase.h"
0011 
0012 #include <vector>
0013 #include <string>
0014 #include <cstdint>
0015 
0016 namespace pos {
0017   /*!  \ingroup ConfigurationObjects "Configuration Objects"
0018 *    
0019 *  @{
0020 *
0021 *  \class PixelFEDCard PixelFEDCard.h
0022 *  \brief This is the documentation about PixelFEDCard...
0023 *
0024 *  The structure which holds all the informations needed to setup 
0025 *  a pixel FED. Danek Kotlinski 18/4/06
0026 */
0027   class PixelFEDCard : public PixelConfigBase {
0028   public:
0029     //Return true or false depending on if iChannel is used
0030     //iChannel=1..36
0031     bool useChannel(unsigned int iChannel);
0032 
0033     //Set iChannel enable to mode
0034     //iChannel=1..36
0035     void setChannel(unsigned int iChannel, bool mode);
0036 
0037     void restoreBaselinAndChannelMasks();
0038     void restoreControlAndModeRegister();
0039 
0040     // Constructor and destructor
0041     PixelFEDCard();                                             // empty
0042     PixelFEDCard(std::string filename);                         // create from files
0043     PixelFEDCard(std::vector<std::vector<std::string> > &tab);  // create from DB
0044     ~PixelFEDCard() override{};
0045 
0046     void readDBTBMLevels(std::vector<std::vector<std::string> > &tableMat, int first, int last);
0047     void readDBROCLevels(std::vector<std::vector<std::string> > &tableMat, int first, int last);
0048     void writeASCII(std::string dir = "") const override;  // write to files
0049     void writeXML(pos::PixelConfigKey key, int version, std::string path) const override;
0050     void writeXMLHeader(pos::PixelConfigKey key, int version, std::string path, std::ofstream *out) const override;
0051     void writeXML(std::ofstream *out) const override;
0052     void writeXMLTrailer(std::ofstream *out) const override;
0053     void writeXMLHeader(pos::PixelConfigKey key,
0054                         int version,
0055                         std::string path,
0056                         std::ofstream *fedstream,
0057                         std::ofstream *roclvlstream,
0058                         std::ofstream *tbmlvlsteram) const override;
0059     void writeXML(std::ofstream *fedstream, std::ofstream *rocstream, std::ofstream *tbmstream) const override;
0060     void writeXMLTrailer(std::ofstream *fedstream, std::ofstream *recostream, std::ofstream *tbmstream) const override;
0061     uint64_t enabledChannels();  // returns 64-bit integer mask 35..0
0062 
0063     //Settable optical input parameters (one for each 12-receiver)
0064     int opt_cap[3];    // Capacitor adjust
0065     int opt_inadj[3];  // DC-input offset
0066     int opt_ouadj[3];  // DC-output offset
0067 
0068     //input offset dac (one for each channel)
0069     int offs_dac[36];
0070 
0071     //clock phases, use bits 0-8, select the clock edge
0072     unsigned int clkphs1_9, clkphs10_18, clkphs19_27, clkphs28_36;
0073 
0074     //Channel delays, one for each channel, 0=15
0075     int DelayCh[36];
0076 
0077     //Blacks and Ultra-blacks, 3 limit per channel
0078     int BlackHi[36];
0079     int BlackLo[36];
0080     int Ublack[36];
0081 
0082     //Signal levels for the TBM, one per channel
0083     int TBM_L0[36], TBM_L1[36], TBM_L2[36], TBM_L3[36], TBM_L4[36];
0084     int TRL_L0[36], TRL_L1[36], TRL_L2[36], TRL_L3[36], TRL_L4[36];
0085     // Address levels 1 per channel (36) per roc(max=26)
0086     int ROC_L0[36][26], ROC_L1[36][26], ROC_L2[36][26], ROC_L3[36][26], ROC_L4[36][26];
0087 
0088     //These bits turn off(1) and on(0) channels
0089     unsigned int Ncntrl, NCcntrl, SCcntrl, Scntrl;
0090 
0091     //The values as read from file so that they can be restored after
0092     //calibration
0093     unsigned int Ncntrl_original, NCcntrl_original, SCcntrl_original, Scntrl_original;
0094 
0095     //Bits (1st 8) used to mask TBM trailer bits
0096     unsigned int N_TBMmask, NC_TBMmask, SC_TBMmask, S_TBMmask;
0097 
0098     //Bits (1st 8) used to set the Private Word in the gap and filler words
0099     unsigned int N_Pword, NC_Pword, SC_Pword, S_Pword;
0100 
0101     // 1 = Special Random trigger DAC mode on, 0=off
0102     unsigned int SpecialDac;
0103 
0104     // Control register and delays for the TTCrx
0105     int CoarseDel, FineDes2Del, FineDes1Del;
0106     unsigned int ClkDes2;
0107 
0108     //Main control reg for determining the DAQ mode
0109     unsigned int Ccntrl;  // "CtrlReg" in LAD_C
0110 
0111     //Mode register
0112     int modeRegister;  // "ModeReg" in LAD_C
0113 
0114     //Number of ROCS per FED channel
0115     int NRocs[36];
0116 
0117     //Control Regs for setting ADC 1Vpp and 2Vpp
0118     unsigned int Nadcg, NCadcg, SCadcg, Sadcg;
0119 
0120     //Control and data Regs for setting Baseline Adjustment
0121     unsigned int Nbaseln, NCbaseln, SCbaseln, Sbaseln;
0122 
0123     //data Regs for TTs adjustable levels
0124     int Ooslvl, Errlvl;
0125 
0126     //data Regs adjustable fifo Almost Full levels
0127     int Nfifo1Bzlvl, NCfifo1Bzlvl, SCfifo1Bzlvl, Sfifo1Bzlvl, fifo3Wrnlvl;
0128 
0129     //Master delay for FED TTC signals
0130     int FedTTCDelay;
0131 
0132     //data Regs adjustable hit limits in fifo1s by fpga
0133     int N_hitlimit, NC_hitlimit, SC_hitlimit, S_hitlimit;
0134 
0135     //data Regs to skip bad ROCs by fpga
0136     int N_testreg, NC_testreg, SC_testreg, S_testreg;
0137 
0138     //The values as read from file so that they can be restored after
0139     //calibration
0140     int Nbaseln_original, NCbaseln_original, SCbaseln_original, Sbaseln_original;
0141 
0142     int Ccntrl_original;
0143     int modeRegister_original;
0144 
0145     //VME base address
0146     unsigned long FEDBASE_0, fedNumber;
0147 
0148     // Most recent additions requested by Will and Danek (Dario)
0149     int BusyHoldMin;
0150     int BusyWhenBehind;
0151     int FeatureRegister;
0152     int FIFO2Limit;
0153     int LastDacOff;
0154     int SimHitsPerRoc;
0155     int TimeoutOROOSLimit;
0156     int TriggerHoldoff;
0157     int SPARE1;
0158     int SPARE2;
0159     int SPARE3;
0160     int SPARE4;
0161     int SPARE5;
0162     int SPARE6;
0163     int SPARE7;
0164     int SPARE8;
0165     int SPARE9;
0166     int SPARE10;
0167 
0168   private:
0169     // Added by Dario (March 26th 2008)
0170     void clear(void);
0171 
0172   };  // end class PixelFEDCard
0173 }  // namespace pos
0174 /* @} */
0175 #endif  // ifdef include