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File indexing completed on 2024-04-06 11:59:51

0001 #include "CalibTracker/SiStripESProducers/plugins/fake/SiStripFedCablingFakeESSource.h"
0002 #include "CalibTracker/SiStripCommon/interface/SiStripDetInfoFileReader.h"
0003 #include "CalibFormats/SiStripObjects/interface/SiStripFecCabling.h"
0004 #include "CalibFormats/SiStripObjects/interface/SiStripModule.h"
0005 #include "CalibTracker/Records/interface/SiStripHashedDetIdRcd.h"
0006 #include "CalibTracker/SiStripCommon/interface/SiStripDetInfoFileReader.h"
0007 #include "CalibTracker/SiStripCommon/interface/SiStripFedIdListReader.h"
0008 #include "CondFormats/SiStripObjects/interface/FedChannelConnection.h"
0009 #include "CondFormats/SiStripObjects/interface/SiStripFedCabling.h"
0010 #include "FWCore/MessageLogger/interface/MessageLogger.h"
0011 #include <sstream>
0012 #include <vector>
0013 #include <map>
0014 
0015 using namespace sistrip;
0016 
0017 // -----------------------------------------------------------------------------
0018 //
0019 SiStripFedCablingFakeESSource::SiStripFedCablingFakeESSource(const edm::ParameterSet& pset)
0020     : SiStripFedCablingESProducer(pset), fedIds_(pset.getParameter<edm::FileInPath>("FedIdsFile")), pset_(pset) {
0021   findingRecord<SiStripFedCablingRcd>();
0022   m_detInfo = SiStripDetInfoFileReader::read(pset.getParameter<edm::FileInPath>("SiStripDetInfoFile").fullPath());
0023   edm::LogVerbatim("FedCabling") << "[SiStripFedCablingFakeESSource::" << __func__ << "]"
0024                                  << " Constructing object...";
0025 }
0026 
0027 // -----------------------------------------------------------------------------
0028 //
0029 SiStripFedCablingFakeESSource::~SiStripFedCablingFakeESSource() {
0030   edm::LogVerbatim("FedCabling") << "[SiStripFedCablingFakeESSource::" << __func__ << "]"
0031                                  << " Destructing object...";
0032 }
0033 
0034 // -----------------------------------------------------------------------------
0035 //
0036 SiStripFedCabling* SiStripFedCablingFakeESSource::make(const SiStripFedCablingRcd&) {
0037   edm::LogVerbatim("FedCabling") << "[SiStripFedCablingFakeESSource::" << __func__ << "]"
0038                                  << " Building \"fake\" FED cabling map"
0039                                  << " from real DetIds and FedIds (read from ascii file)";
0040 
0041   // Create FEC cabling object
0042   SiStripFecCabling* fec_cabling = new SiStripFecCabling();
0043 
0044   // Read DetId list from file
0045   typedef std::vector<uint32_t> Dets;
0046   Dets dets = m_detInfo.getAllDetIds();
0047 
0048   // Read FedId list from file
0049   typedef std::vector<uint16_t> Feds;
0050   Feds feds = SiStripFedIdListReader(fedIds_.fullPath()).fedIds();
0051 
0052   bool populateAllFeds = pset_.getParameter<bool>("PopulateAllFeds");
0053 
0054   // Iterator through DetInfo objects and populate FEC cabling object
0055   uint32_t imodule = 0;
0056   Dets::const_iterator idet = dets.begin();
0057   Dets::const_iterator jdet = dets.end();
0058   for (; idet != jdet; ++idet) {
0059     uint16_t npairs = m_detInfo.getNumberOfApvsAndStripLength(*idet).first / 2;
0060     for (uint16_t ipair = 0; ipair < npairs; ++ipair) {
0061       uint16_t addr = 0;
0062       if (npairs == 2 && ipair == 0) {
0063         addr = 32;
0064       } else if (npairs == 2 && ipair == 1) {
0065         addr = 36;
0066       } else if (npairs == 3 && ipair == 0) {
0067         addr = 32;
0068       } else if (npairs == 3 && ipair == 1) {
0069         addr = 34;
0070       } else if (npairs == 3 && ipair == 2) {
0071         addr = 36;
0072       } else {
0073         edm::LogWarning("FedCabling") << "[SiStripFedCablingFakeESSource::" << __func__ << "]"
0074                                       << " Inconsistent values for nPairs (" << npairs << ") and ipair (" << ipair
0075                                       << ")!";
0076       }
0077       uint32_t module_key =
0078           SiStripFecKey(fecCrate(imodule), fecSlot(imodule), fecRing(imodule), ccuAddr(imodule), ccuChan(imodule)).key();
0079       FedChannelConnection conn(fecCrate(imodule),
0080                                 fecSlot(imodule),
0081                                 fecRing(imodule),
0082                                 ccuAddr(imodule),
0083                                 ccuChan(imodule),
0084                                 addr,
0085                                 addr + 1,    // apv i2c addresses
0086                                 module_key,  // dcu id
0087                                 *idet,       // det id
0088                                 npairs);     // apv pairs
0089       fec_cabling->addDevices(conn);
0090     }
0091     imodule++;
0092   }
0093 
0094   // Assign "dummy" FED ids/chans
0095   bool insufficient = false;
0096   Feds::const_iterator ifed = feds.begin();
0097   uint16_t fed_ch = 0;
0098   for (auto& icrate : fec_cabling->crates()) {
0099     for (auto& ifec : icrate.fecs()) {
0100       for (auto& iring : ifec.rings()) {
0101         for (auto& iccu : iring.ccus()) {
0102           for (auto& imod : iccu.modules()) {
0103             if (populateAllFeds) {
0104               for (uint16_t ipair = 0; ipair < imod.nApvPairs(); ipair++) {
0105                 if (ifed == feds.end()) {
0106                   fed_ch++;
0107                   ifed = feds.begin();
0108                 }
0109                 if (fed_ch == 96) {
0110                   insufficient = true;
0111                   break;
0112                 }
0113 
0114                 std::pair<uint16_t, uint16_t> addr = imod.activeApvPair(imod.lldChannel(ipair));
0115                 SiStripModule::FedChannel fed_channel((*ifed) / 16 + 1,  // 16 FEDs per crate, numbering starts from 1
0116                                                       (*ifed) % 16 + 2,  // FED slot starts from 2
0117                                                       *ifed,
0118                                                       fed_ch);
0119                 imod.fedCh(addr.first, fed_channel);
0120                 ifed++;
0121               }
0122             } else {
0123               // Patch introduced by D.Giordano 2/12/08
0124               //to reproduce the fake cabling used in 2x
0125               //that was designed to fill each fed iteratively
0126               //filling all channels of a fed before going to the next one
0127               if (96 - fed_ch < imod.nApvPairs()) {
0128                 ifed++;
0129                 fed_ch = 0;
0130               }  // move to next FED
0131               for (uint16_t ipair = 0; ipair < imod.nApvPairs(); ipair++) {
0132                 std::pair<uint16_t, uint16_t> addr = imod.activeApvPair(imod.lldChannel(ipair));
0133                 SiStripModule::FedChannel fed_channel((*ifed) / 16 + 1,  // 16 FEDs per crate, numbering starts from 1
0134                                                       (*ifed) % 16 + 2,  // FED slot starts from 2
0135                                                       (*ifed),
0136                                                       fed_ch);
0137                 imod.fedCh(addr.first, fed_channel);
0138                 fed_ch++;
0139               }
0140             }
0141           }
0142         }
0143       }
0144     }
0145   }
0146 
0147   if (insufficient) {
0148     edm::LogWarning(mlCabling_) << "[SiStripFedCablingFakeESSource::" << __func__ << "]"
0149                                 << " Insufficient FED channels to cable entire system!";
0150   }
0151 
0152   // Some debug
0153   std::stringstream ss;
0154   ss << "[SiStripFedCablingFakeESSource::" << __func__ << "]"
0155      << " First count devices of FEC cabling " << std::endl;
0156   fec_cabling->countDevices().print(ss);
0157   LogTrace(mlCabling_) << ss.str();
0158 
0159   // Build FED cabling using FedChannelConnections
0160   std::vector<FedChannelConnection> conns;
0161   fec_cabling->connections(conns);
0162   SiStripFedCabling* cabling = new SiStripFedCabling(conns);
0163 
0164   return cabling;
0165 }
0166 
0167 // -----------------------------------------------------------------------------
0168 //
0169 void SiStripFedCablingFakeESSource::setIntervalFor(const edm::eventsetup::EventSetupRecordKey& key,
0170                                                    const edm::IOVSyncValue& iov_sync,
0171                                                    edm::ValidityInterval& iov_validity) {
0172   edm::ValidityInterval infinity(iov_sync.beginOfTime(), iov_sync.endOfTime());
0173   iov_validity = infinity;
0174 }