File indexing completed on 2024-04-06 11:59:07
0001 #include "DataFormats/Common/interface/Handle.h"
0002 #include "DataFormats/HcalDigi/interface/HcalDigiCollections.h"
0003 #include "FWCore/Framework/interface/one/EDAnalyzer.h"
0004 #include "FWCore/Framework/interface/Event.h"
0005 #include "FWCore/MessageLogger/interface/MessageLogger.h"
0006 #include "FWCore/ParameterSet/interface/ParameterSet.h"
0007 #include <cstdio>
0008 #include <iostream>
0009
0010 using namespace std;
0011
0012
0013
0014
0015
0016 class HcalCableMapper : public edm::one::EDAnalyzer<> {
0017 public:
0018 explicit HcalCableMapper(edm::ParameterSet const &conf);
0019 ~HcalCableMapper() override = default;
0020 void analyze(edm::Event const &iEvent, edm::EventSetup const &iSetup) override;
0021 void endJob() override;
0022
0023 private:
0024 typedef std::vector<HcalQIESample> SampleSet;
0025
0026 typedef std::map<HcalDetId, SampleSet> PathSet;
0027 typedef std::map<HcalDetId, HcalElectronicsId> IdMap;
0028
0029 void process(const PathSet &ps, const IdMap &im);
0030
0031 std::map<HcalDetId, std::vector<SampleSet>> fullHistory_;
0032 IdMap IdSet;
0033 const edm::EDGetTokenT<HBHEDigiCollection> tok_hbhe_;
0034 const edm::EDGetTokenT<HODigiCollection> tok_ho_;
0035 const edm::EDGetTokenT<HFDigiCollection> tok_hf_;
0036
0037 template <class DigiCollection>
0038 void record(const DigiCollection &digis) {
0039 for (typename DigiCollection::const_iterator digi = digis.begin(); digi != digis.end(); digi++) {
0040 SampleSet q;
0041 for (int i = 0; i < digi->size(); i++)
0042 q.push_back(digi->sample(i));
0043
0044 if (fullHistory_.find(digi->id()) == fullHistory_.end())
0045 fullHistory_.insert(std::pair<HcalDetId, std::vector<SampleSet>>(digi->id(), std::vector<SampleSet>()));
0046 if (IdSet.find(digi->id()) == IdSet.end())
0047 IdSet.insert(std::pair<HcalDetId, HcalElectronicsId>(digi->id(), HcalElectronicsId()));
0048 fullHistory_[digi->id()].push_back(q);
0049 IdSet[digi->id()] = digi->elecId();
0050 }
0051 }
0052 };
0053
0054 HcalCableMapper::HcalCableMapper(edm::ParameterSet const &conf)
0055 : tok_hbhe_(consumes<HBHEDigiCollection>(conf.getParameter<edm::InputTag>("hbheLabel"))),
0056 tok_ho_(consumes<HODigiCollection>(conf.getParameter<edm::InputTag>("hoLabel"))),
0057 tok_hf_(consumes<HFDigiCollection>(conf.getParameter<edm::InputTag>("hfLabel"))) {}
0058
0059 constexpr char const *det_names[] = {"Zero", "HcalBarrel", "HcalEndcap", "HcalForward", "HcalOuter"};
0060
0061 void HcalCableMapper::process(const PathSet &ps, const IdMap &im) {
0062 PathSet::const_iterator iii;
0063 IdMap::const_iterator ij;
0064
0065 for (iii = ps.begin(); iii != ps.end(); iii++) {
0066 SampleSet ss = iii->second;
0067 const HcalDetId dd = iii->first;
0068
0069 ij = im.find(dd);
0070 HcalElectronicsId eid = ij->second;
0071
0072 int header = ((ss[0].adc()) & 0x7F);
0073 int ieta = ((ss[1].adc()) & 0x3F);
0074 int z_ieta = (((ss[1].adc()) >> 6) & 0x1);
0075 int iphi = ((ss[2].adc()) & 0x7F);
0076 int depth = ((ss[3].adc()) & 0x7);
0077 int det = (((ss[3].adc()) >> 3) & 0xF);
0078 int spigot = ((ss[4].adc()) & 0xF);
0079 int fiber = (((ss[4].adc()) >> 4) & 0x7);
0080 int crate = ((ss[5].adc()) & 0x1F);
0081 int fiber_chan = (((ss[5].adc()) >> 5) & 0x3);
0082 int G_Dcc = ((ss[6].adc()) & 0x3F);
0083 int H_slot = ((ss[7].adc()) & 0x1F);
0084 int TB = (((ss[7].adc()) >> 5) & 0x1);
0085 int RBX_7 = (((ss[7].adc()) >> 6) & 0x1);
0086 int RBX = ((ss[8].adc()) & 0x7F);
0087 int RM = ((ss[9].adc()) & 0x3);
0088 int RM_card = (((ss[9].adc()) >> 2) & 0x3);
0089 int RM_chan = (((ss[9].adc()) >> 4) & 0x7);
0090 string eta_sign;
0091 std::string det_name;
0092 if (det > 4 || det < 0) {
0093 char c[20];
0094 snprintf(c, 20, "Det=%d", det);
0095 det_name = c;
0096 } else
0097 det_name = det_names[det];
0098
0099 if (z_ieta == 1) {
0100 eta_sign = "+";
0101 } else {
0102 eta_sign = "-";
0103 }
0104 string is_header;
0105 if (header == 0x75) {
0106
0107 if ((spigot == eid.spigot()) && (fiber + 1 == eid.fiberIndex()) && (fiber_chan == eid.fiberChanId()) &&
0108 (H_slot == eid.htrSlot()) && (G_Dcc == eid.dccid()) && (crate == eid.readoutVMECrateId()) &&
0109 (iphi == dd.iphi()) && (depth == dd.depth()) && (ieta == dd.ietaAbs()) && (TB == eid.htrTopBottom()) &&
0110 (det == dd.subdet())) {
0111 edm::LogVerbatim("HcalCableMapper") << "Pathway match";
0112 } else {
0113 is_header = " Header found";
0114
0115 edm::LogVerbatim("HcalCableMapper")
0116 << " Digi ID: " << dd << is_header << " ieta: " << eta_sign << ieta << " iphi: " << iphi
0117 << " Depth: " << depth << " Detector: " << det_name << " Spigot: " << spigot << "/" << eid.spigot()
0118 << " Fiber: " << fiber + 1 << "/" << eid.fiberIndex() << " Fiber Channel: " << fiber_chan << "/"
0119 << eid.fiberChanId() << " Crate: " << crate << "/" << eid.readoutVMECrateId() << " Global Dcc: " << G_Dcc
0120 << "/" << eid.dccid() << " HTR Slot: " << H_slot << "/ " << eid.htrSlot() << " Top/Bottom: " << TB << "/"
0121 << eid.htrTopBottom() << " RBX: " << (RBX_7 * 128 + RBX) << " RM: " << RM + 1 << " RM Card: " << RM_card + 1
0122 << " RM Channel: " << RM_chan;
0123 }
0124 } else if (ieta + 64 == 0x75) {
0125 ieta = ((ss[2].adc()) & 0x3F);
0126 iphi = ((ss[3].adc()) & 0x7F);
0127 depth = ((ss[4].adc()) & 0x7);
0128 det = (((ss[4].adc()) >> 3) & 0xF);
0129 spigot = ((ss[5].adc()) & 0xF);
0130 fiber = (((ss[5].adc()) >> 4) & 0x7);
0131 crate = ((ss[6].adc()) & 0x1F);
0132 fiber_chan = (((ss[6].adc()) >> 5) & 0x3);
0133 G_Dcc = ((ss[7].adc()) & 0x3F);
0134 H_slot = ((ss[8].adc()) & 0x1F);
0135 TB = (((ss[8].adc()) >> 5) & 0x1);
0136 RBX_7 = (((ss[8].adc()) >> 6) & 0x1);
0137 RBX = ((ss[9].adc()) & 0x7F);
0138
0139
0140 if ((spigot == eid.spigot()) && (fiber + 1 == eid.fiberIndex()) && (fiber_chan == eid.fiberChanId()) &&
0141 (H_slot == eid.htrSlot()) && (G_Dcc == eid.dccid()) && (TB == eid.htrTopBottom()) &&
0142 (crate == eid.readoutVMECrateId()) && (iphi == dd.iphi()) && (depth == dd.depth()) && (det == dd.subdet()) &&
0143 (ieta == dd.ietaAbs())) {
0144 edm::LogVerbatim("HcalCableMapper") << "Pathway match (SHIFT)";
0145 } else {
0146 is_header = " DATA SHIFT";
0147
0148 edm::LogVerbatim("HcalCableMapper")
0149 << " Digi ID: " << dd << is_header << " ieta: " << eta_sign << ieta << " iphi: " << iphi
0150 << " Depth: " << depth << " Detector: " << det_name << " Spigot: " << spigot << "/" << eid.spigot()
0151 << " Fiber: " << fiber + 1 << "/" << eid.fiberIndex() << " Fiber Channel: " << fiber_chan << "/"
0152 << eid.fiberChanId() << " Crate: " << crate << "/" << eid.readoutVMECrateId() << " Global Dcc: " << G_Dcc
0153 << "/" << eid.dccid() << " HTR Slot: " << H_slot << "/ " << eid.htrSlot() << " Top/Bottom: " << TB << "/"
0154 << eid.htrTopBottom() << " RBX: " << (RBX_7 * 128 + RBX);
0155 }
0156 } else {
0157 edm::LogVerbatim("HcalCableMapper") << " Digi ID: " << dd << " +NO HEADER+ RBX: " << (RBX_7 * 128 + RBX);
0158 }
0159 }
0160 }
0161
0162 void HcalCableMapper::analyze(edm::Event const &iEvent, edm::EventSetup const &) {
0163 const HBHEDigiCollection &hbhe = iEvent.get(tok_hbhe_);
0164 const HFDigiCollection &hf = iEvent.get(tok_hf_);
0165 const HODigiCollection &ho = iEvent.get(tok_ho_);
0166
0167 record(hbhe);
0168 record(hf);
0169 record(ho);
0170 }
0171
0172 void HcalCableMapper::endJob() {
0173 std::vector<SampleSet>::iterator j;
0174 int c[128];
0175 int k, ii, kk;
0176 int c_max = 0;
0177
0178 std::map<HcalDetId, std::vector<SampleSet>>::iterator i;
0179
0180 PathSet consensus;
0181
0182 for (i = fullHistory_.begin(); i != fullHistory_.end(); i++) {
0183
0184
0185 SampleSet s;
0186 for (k = 0; k < 10; k++) {
0187 for (ii = 0; ii < 128; ii++)
0188 c[ii] = 0;
0189
0190 for (j = i->second.begin(); j != i->second.end(); j++) {
0191 if (int(j->size()) > k)
0192 c[(*j)[k].adc()]++;
0193
0194 }
0195
0196 for (kk = 0; kk < 128; kk++) {
0197 if (c[kk] > c[c_max]) {
0198 c_max = kk;
0199 }
0200 }
0201
0202 s.push_back(((c_max & 0x7F)));
0203
0204 c_max = 0;
0205 }
0206 consensus[i->first] = s;
0207
0208 }
0209
0210 process(consensus, IdSet);
0211
0212 }
0213
0214 #include "FWCore/Framework/interface/MakerMacros.h"
0215 #include "FWCore/PluginManager/interface/ModuleDef.h"
0216
0217 DEFINE_FWK_MODULE(HcalCableMapper);