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File indexing completed on 2025-01-18 03:41:49

0001 // Authors: Izaak Neutelings (May 2024)
0002 // Sources: https://docs.google.com/spreadsheets/d/13G7sOjssqw4B5AtOcQV3g0W01oZUOMM6Hm_DduxBEPU
0003 #ifndef CondFormats_HGCalObjects_HGCalConfiguraton_h
0004 #define CondFormats_HGCalObjects_HGCalConfiguraton_h
0005 #include "CondFormats/Serialization/interface/Serializable.h"
0006 #include "CondFormats/HGCalObjects/interface/HGCalMappingModuleIndexer.h"
0007 #include <map>
0008 #include <vector>
0009 
0010 // @short configuration for ECON eRX (one half of HGROC)
0011 struct HGCalROCConfig {
0012   uint32_t charMode;  // characterization mode; determines data fields in ROC dataframe
0013   uint8_t gain;       // pre-amp gain used (1: 80 fC, 2: 160 fC, 4: 320 fC)
0014   //uint32_t clockPhase;     // fine adjustment of the phase within the 40 MHz
0015   //uint32_t L1AcceptOffset; // coarse adjustment to get the peak in the right place
0016   //uint32_t injChannels;    // injected channels for injection scan: 2b word to identify if connected or not+info no capacitor chosen
0017   //uint32_t injCharge;      // injected charge for injection scan: convert it to a float in units of fC offline (DAC setting?)
0018   COND_SERIALIZABLE;
0019 };
0020 
0021 // @short configuration for ECON-D module
0022 struct HGCalECONDConfig {
0023   //std::string typecode;
0024   uint32_t headerMarker;  // begin of event marker/identifier for ECON-D
0025   uint32_t passThrough;   //pass through mode (this is just as check as it'll be in the ECON-D header anyway)
0026   std::vector<HGCalROCConfig> rocs;
0027   COND_SERIALIZABLE;
0028 };
0029 
0030 // @short configuration for FED
0031 struct HGCalFedConfig {
0032   bool mismatchPassthroughMode;  // ignore ECON-D packet mismatches
0033   uint32_t cbHeaderMarker;       // begin of event marker/identifier for capture block
0034   uint32_t slinkHeaderMarker;    // begin of event marker/identifier for S-link
0035   //uint32_t delay; // delay
0036   std::vector<HGCalECONDConfig> econds;
0037   COND_SERIALIZABLE;
0038 };
0039 
0040 /**
0041  *  @short Main HGCal configuration with a tree structure of vectors of
0042  *         HGCalFedConfig/HGCalECONDConfig/HGCalROCConfig structs as follows:
0043  %         config.feds[dense_fed_idx].econds[dense_econd_idx].rocs[dense_eRx_idx]
0044  **/
0045 class HGCalConfiguration {
0046 public:
0047   std::vector<HGCalFedConfig> feds;
0048 
0049 private:
0050   COND_SERIALIZABLE;
0051 };
0052 
0053 inline std::ostream& operator<<(std::ostream& os, const HGCalConfiguration& config) {
0054   uint32_t nfed = config.feds.size();
0055   uint32_t ntotmod = 0;
0056   uint32_t ntotroc = 0;
0057   for (auto const& fed : config.feds) {
0058     ntotmod += fed.econds.size();  // number of ECON-D modules for this FED
0059     for (auto const& mod : fed.econds) {
0060       ntotroc += mod.rocs.size();  // number of eRx half-ROCs for this ECON-D module
0061     }
0062   }
0063   os << "HGCalConfiguration(nfed=" << nfed << ",ntotmod=" << ntotmod << ",ntotroc=" << ntotroc << ")";
0064   return os;
0065 }
0066 
0067 #endif