CSCRawToDigi/interface/CSCDMBTrailer2013.h

0001 #ifndef EventFilter_CSCRawToDigi_CSCDMBTrailer2013_h
0002 #define EventFilter_CSCRawToDigi_CSCDMBTrailer2013_h
0003
0004 /*
0005  DMB-DDU 2013 Header/Trailer bit definitions (some bits get repeated for bit error mitigation)
0006
0007     DMB_L1A:    L1A Event Number, count from DMB
0008     DMB_BXN:    Bunch Crossing Number, count from DMB
0009     TMB_DAV:    non-zero indicates TMB data exists for this event
0010     ALCT_DAV:    non-zero indicates ALCT data exists for this event
0011     CFEB_CLCT_SENT:    indicates which CFEBs should have sent data to DMB
0012     CFEB_DAV:    indicates which CFEBs have sent data to DMB
0013     CLCT-DAV-Mismatch:    the CFEB_DAVs do not match the CLCTs sent
0014     DMB_CRATE:    peripheral crate ID from DMB
0015     DMB_ID:    board number of DMB
0016     CFEB_MOVLP:    the time sample for this event has multiple overlaps with samples from previous events
0017     DMB-CFEB-Sync:    bits used for DMB-CFEB synchronization check
0018     ALCT_HALF:    zero indicates that the ALCT FIFO on the DMB is half-full
0019     TMB_HALF:    zero indicates that the TMB FIFO on the DMB is half-full
0020     CFEB_HALF:    zero indicates that the CFEB FIFO on the DMB is half-full
0021     DMB_L1PIPE:    number of L1A Events backed-up in the DMB
0022     ALCT_EMPTY:    one indicates that the ALCT FIFO on the DMB is empty
0023     TMB_EMPTY:    one indicates that the TMB FIFO on the DMB is empty
0024     CFEB_EMPTY:    one indicates that the CFEB FIFO on the DMB is empty
0025     ALCT_Start_Timeout:    indicates that the start of ALCT data was not detected within the time-out period
0026     TMB_Start_Timeout:    indicates that the start of TMB data was not detected within the time-out period
0027     CFEB_Start_Timeout:    indicates that the start of CFEB data was not detected within the time-out period.
0028     CFEB_End_Timeout:    indicates that the end of CFEB data was not detected within the time-out period
0029     ALCT_End_Timeout:    indicates that the end of ALCT data was not detected within the time-out period
0030     TMB_End_Timeout:    indicates that the end of TMB data was not detected within the time-out period
0031     ALCT_FULL:    one indicates that the ALCT FIFO on the DMB is full
0032     TMB_FULL:    one indicates that the TMB FIFO on the DMB is full
0033     CFEB_FULL:    one indicates that the CFEB FIFO on the DMB is full
0034     DMB_CRC:    each DMB generates a 22-bit CRC that encompasses all CSC data from the first 9-code to the last F-code in the event
0035  */
0036
0037 #include <iostream>
0038 #include "DataFormats/CSCDigi/interface/CSCDMBStatusDigi.h"
0039 #include "EventFilter/CSCRawToDigi/interface/CSCDMBHeader.h"
0040 #include "EventFilter/CSCRawToDigi/interface/CSCVDMBTrailerFormat.h"
0041
0042 struct CSCDMBTrailer2013 : public CSCVDMBTrailerFormat {
0043   // public:
0044   CSCDMBTrailer2013() {
0045     bzero(data(), sizeInWords() * 2);
0046     bits.ddu_code_1 = bits.ddu_code_2 = bits.ddu_code_3 = bits.ddu_code_4 = 0xF;
0047     bits.ddu_code_5 = bits.ddu_code_6 = bits.ddu_code_7 = bits.ddu_code_8 = 0xE;
0048   }
0049
0050   CSCDMBTrailer2013(const uint16_t *buf) { memcpy(data(), buf, sizeInWords() * 2); }
0051
0052   /*
0053   CSCDMBTrailer2013(const CSCDMBStatusDigi & digi)
0054     {
0055       memcpy(this, digi.trailer(), sizeInWords()*2);
0056     }
0057 */
0058
0059   ///@@ NEEDS TO BE DONE
0060   void setEventInformation(const CSCDMBHeader &dmbHeader) override {
0061     bits.dmb_id = dmbHeader.dmbID();
0062     bits.crate_id = dmbHeader.crateID();
0063     bits.dmb_l1a = dmbHeader.l1a();
0064     bits.dmb_bxn = dmbHeader.bxn();
0065   };
0066
0067   unsigned crateID() const override { return bits.crate_id; };
0068   unsigned dmbID() const override { return bits.dmb_id; };
0069
0070   unsigned dmb_l1a() const override { return bits.dmb_l1a; };
0071   unsigned dmb_bxn() const override { return bits.dmb_bxn; };
0072
0073   unsigned alct_endtimeout() const override { return bits.alct_endtimeout; };
0074   unsigned tmb_endtimeout() const override { return bits.tmb_endtimeout; };
0075   unsigned cfeb_endtimeout() const override { return bits.cfeb_endtimeout; };
0076
0077   unsigned alct_starttimeout() const override { return bits.alct_starttimeout; };
0078   unsigned tmb_starttimeout() const override { return bits.tmb_starttimeout; };
0079   unsigned cfeb_starttimeout() const override { return bits.cfeb_starttimeout; };
0080
0081   unsigned cfeb_movlp() const override { return bits.cfeb_movlp; };
0082   unsigned dmb_l1pipe() const override { return bits.dmb_l1pipe; };
0083
0084   /// Empty bits don't exists in new format
0085   unsigned alct_empty() const override { return 0; };
0086   unsigned tmb_empty() const override { return 0; };
0087   unsigned cfeb_empty() const override { return 0; };
0088
0089   unsigned alct_half() const override { return bits.alct_half; };
0090   unsigned tmb_half() const override { return bits.tmb_half; };
0091   unsigned cfeb_half() const override { return bits.cfeb_half; };
0092
0093   unsigned alct_full() const override { return bits.alct_full; };
0094   unsigned tmb_full() const override { return bits.tmb_full; };
0095   unsigned cfeb_full() const override { return (bits.cfeb_full_lowo | (bits.cfeb_full_hiwo << 3)); };
0096
0097   unsigned crc22() const override { return (bits.dmb_crc_1 | (bits.dmb_crc_2 << 11)); };
0098   unsigned crc_lo_parity() const override { return bits.dmb_parity_1; };
0099   unsigned crc_hi_parity() const override { return bits.dmb_parity_2; };
0100
0101   unsigned short *data() override { return (unsigned short *)(&bits); }
0102   unsigned short *data() const override { return (unsigned short *)(&bits); }
0103
0104   bool check() const override {
0105     return bits.ddu_code_1 == 0xF && bits.ddu_code_2 == 0xF && bits.ddu_code_3 == 0xF && bits.ddu_code_4 == 0xF &&
0106            bits.ddu_code_5 == 0xE && bits.ddu_code_6 == 0xE && bits.ddu_code_7 == 0xE && bits.ddu_code_8 == 0xE;
0107   }
0108
0109   unsigned sizeInWords() const override { return 8; }
0110
0111   struct {
0112     /// 1st Trailer word
0113     unsigned dmb_l1a : 6;          /// DMB_L1A[5:0]
0114     unsigned dmb_bxn : 5;          /// DMB_BXN[4:0]
0115     unsigned alct_endtimeout : 1;  /// ALCT_End_Timeout(1)
0116     unsigned ddu_code_1 : 4;       /// constant, should be '1111'
0117
0118     /// 2nd Trailer word
0119     unsigned cfeb_endtimeout : 7;  /// CFEB_End_Timeout(7:1)
0120     unsigned cfeb_movlp : 5;       /// CFEB_MOVLP(5:1)
0121     unsigned ddu_code_2 : 4;       /// constant, should be '1111'
0122
0123     /// 3rd Trailer word
0124     unsigned dmb_l1pipe : 8;        /// DMB_L1PIPE(8)
0125     unsigned tmb_starttimeout : 1;  /// TMB_Start_Timeout(1)
0126     unsigned cfeb_full_lowo : 3;    /// CFEB_FULL(3:1)
0127     unsigned ddu_code_3 : 4;        /// constant, should be '1111'
0128
0129     /// 4th Trailer word
0130     unsigned cfeb_full_hiwo : 4;     /// CFEB_FULL(7:4)
0131     unsigned cfeb_starttimeout : 7;  /// CFEB_Start_Timeout(7:1)
0132     unsigned alct_starttimeout : 1;  /// ALCT_Start_Timeout(1)
0133     unsigned ddu_code_4 : 4;         /// constant, should be '1111'
0134
0135     /// 5th Trailer word
0136     unsigned cfeb_half : 7;       /// CFEB_HALF(7:1)
0137     unsigned tmb_endtimeout : 1;  /// TMB_End_Timeout(1)
0138     unsigned tmb_half : 1;        /// TMB_HALF(1)
0139     unsigned alct_half : 1;       /// ALCT_HALF(1)
0140     unsigned tmb_full : 1;        /// TMB_FULL(1)
0141     unsigned alct_full : 1;       /// ALCT_FULL(1)
0142     unsigned ddu_code_5 : 4;      /// constant, should be '1110'
0143
0144     /// 6th Trailer word
0145     unsigned dmb_id : 4;      /// DMB_ID(4)
0146     unsigned crate_id : 8;    /// DMB_CRATE(8)
0147     unsigned ddu_code_6 : 4;  /// constant, should be '1110'
0148
0149     /// 7th Trailer word
0150     unsigned dmb_crc_1 : 11;    /// DMB_CRC[10:0]
0151     unsigned dmb_parity_1 : 1;  /// DMB_CRC_LowParity(1)
0152     unsigned ddu_code_7 : 4;    /// constant, should be '1110'
0153
0154     /// 8th Trailer word
0155     unsigned dmb_crc_2 : 11;    /// DMB_CRC[21:11]
0156     unsigned dmb_parity_2 : 1;  /// DMB_CRC_HighParity(1)
0157     unsigned ddu_code_8 : 4;    /// constant, should be '1110'
0158   } bits;
0159 };
0160
0161 #endif