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File indexing completed on 2022-09-02 08:36:07

0001 #include "EventFilter/CSCRawToDigi/interface/CSCTMBHeader2020_GEM.h"
0002 #include "EventFilter/CSCRawToDigi/interface/CSCDMBHeader.h"
0003 #include "FWCore/Utilities/interface/Exception.h"
0004 
0005 const std::vector<std::pair<unsigned, unsigned> >
0006     run3_pattern_lookup_tbl = {{0, 0}, {0, 1}, {0, 2}, {0, 3}, {0, 4},  /// Valid LCT0, invalid LCT1 combination. Check LCT1 vpf
0007                                {0, 0}, {0, 1}, {0, 2}, {0, 3}, {0, 4}, {1, 0}, {1, 1}, {1, 2}, {1, 3},
0008                                {1, 4}, {2, 0}, {2, 1}, {2, 2}, {2, 3}, {2, 4}, {3, 0}, {3, 1}, {3, 2},
0009                                {3, 3}, {3, 4}, {4, 0}, {4, 1}, {4, 2}, {4, 3}, {4, 4}};  /// pattern IDs 30,31 are reserved
0010 
0011 const unsigned run2_pattern_lookup_tbl[2][16] = {{10, 10, 10, 8, 8, 8, 6, 6, 6, 4, 4, 4, 2, 2, 2, 2},
0012                                                  {10, 10, 10, 9, 9, 9, 7, 7, 7, 5, 5, 5, 3, 3, 3, 3}};
0013 
0014 CSCTMBHeader2020_GEM::CSCTMBHeader2020_GEM() {
0015   bzero(data(), sizeInWords() * 2);
0016   bits.nHeaderFrames = 42;
0017   bits.e0bline = 0x6E0B;
0018   bits.b0cline = 0xDB0C;
0019   bits.firmRevCode = 0x601;
0020   bits.nTBins = 12;
0021   bits.nCFEBs = 7;
0022   /// Set default GEM-OTMB readout configuration
0023   /// 12 time bins, all 4 GEM fibers enabled
0024   bits.fifo_tbins_gem_ = 12;
0025   bits.gem_enabled_fibers_ = 0xf;
0026 }
0027 
0028 CSCTMBHeader2020_GEM::CSCTMBHeader2020_GEM(const unsigned short* buf) { memcpy(data(), buf, sizeInWords() * 2); }
0029 
0030 void CSCTMBHeader2020_GEM::setEventInformation(const CSCDMBHeader& dmbHeader) {
0031   bits.cscID = dmbHeader.dmbID();
0032   bits.l1aNumber = dmbHeader.l1a();
0033   bits.bxnCount = dmbHeader.bxn();
0034 }
0035 
0036 ///returns CLCT digis
0037 std::vector<CSCCLCTDigi> CSCTMBHeader2020_GEM::CLCTDigis(uint32_t idlayer) {
0038   std::vector<CSCCLCTDigi> result;
0039   unsigned halfstrip = bits.clct0_key_low + (bits.clct0_key_high << 7);
0040   unsigned strip = halfstrip % 32;
0041   // CLCT0 1/4 strip bit
0042   bool quartstrip = (bits.clct0_xky >> 1) & 0x1;
0043   // CLCT1 1/8 strip bit
0044   bool eighthstrip = bits.clct0_xky & 0x1;
0045   unsigned cfeb = halfstrip / 32;
0046 
0047   /// CLCT0 LR bend and slope are from dedicated header fields
0048   unsigned run3_pattern = bits.clct0_shape & 0x7;  // 3-bit Run3 CLCT PatternID
0049   unsigned bend = bits.clct0_LR_bend;
0050   unsigned slope = bits.clct0_slope;
0051   unsigned run2_pattern = run2_pattern_lookup_tbl[bend][slope];
0052 
0053   CSCCLCTDigi digi0(bits.clct0_valid,
0054                     bits.clct0_quality,
0055                     run2_pattern,
0056                     1,
0057                     bend,
0058                     strip,
0059                     cfeb,
0060                     bits.clct_bxn,
0061                     1,
0062                     bits.bxnPreTrigger,
0063                     bits.clct0_comparator_code,
0064                     CSCCLCTDigi::Version::Run3,
0065                     quartstrip,
0066                     eighthstrip,
0067                     run3_pattern,
0068                     slope);
0069 
0070   halfstrip = bits.clct1_key_low + (bits.clct1_key_high << 7);
0071   strip = halfstrip % 32;
0072   // CLCT0 1/4 strip bit
0073   quartstrip = (bits.clct1_xky >> 1) & 0x1;
0074   // CLCT1 1/8 strip bit
0075   eighthstrip = bits.clct1_xky & 0x1;
0076   cfeb = halfstrip / 32;
0077 
0078   // CLCT LR bend and slope are from dedicated header fields
0079   run3_pattern = bits.clct1_shape & 0x7;  // 3-bit Run3 CLCT PatternID
0080   bend = bits.clct1_LR_bend;
0081   slope = bits.clct1_slope;
0082   run2_pattern = run2_pattern_lookup_tbl[bend][slope];
0083 
0084   CSCCLCTDigi digi1(bits.clct1_valid,
0085                     bits.clct1_quality,
0086                     run2_pattern,
0087                     1,
0088                     bend,
0089                     strip,
0090                     cfeb,
0091                     bits.clct_bxn,
0092                     2,
0093                     bits.bxnPreTrigger,
0094                     bits.clct1_comparator_code,
0095                     CSCCLCTDigi::Version::Run3,
0096                     quartstrip,
0097                     eighthstrip,
0098                     run3_pattern,
0099                     slope);
0100 
0101   result.push_back(digi0);
0102   result.push_back(digi1);
0103   return result;
0104 }
0105 
0106 ///returns CorrelatedLCT digis
0107 std::vector<CSCCorrelatedLCTDigi> CSCTMBHeader2020_GEM::CorrelatedLCTDigis(uint32_t idlayer) const {
0108   std::vector<CSCCorrelatedLCTDigi> result;
0109   /// for the zeroth MPC word:
0110   unsigned strip = bits.MPC_Muon0_clct_key_halfstrip;  //this goes from 0-223
0111   unsigned slope = (bits.MPC_Muon0_clct_bend_low & 0x7) | (bits.MPC_Muon0_clct_bend_bit4 << 3);
0112   unsigned hmt = bits.MPC_Muon_HMT_bit0 | (bits.MPC_Muon_HMT_high << 1);  // HighMultiplicityTrigger
0113   unsigned clct_pattern_id = bits.MPC_Muon_clct_pattern_low | (bits.MPC_Muon_clct_pattern_bit5 << 4);
0114 
0115   std::pair<unsigned, unsigned> run3_pattern_pair = run3_pattern_lookup_tbl[clct_pattern_id % 30];
0116   unsigned run2_pattern = run2_pattern_lookup_tbl[bits.MPC_Muon0_clct_LR][slope];
0117   unsigned run3_pattern = run3_pattern_pair.second & 0x7;
0118 
0119   CSCCorrelatedLCTDigi digi(1,
0120                             bits.MPC_Muon0_lct_vpf,
0121                             bits.MPC_Muon0_lct_quality,
0122                             bits.MPC_Muon0_alct_key_wire,
0123                             strip,
0124                             run2_pattern,
0125                             bits.MPC_Muon0_clct_LR,
0126                             bits.MPC_Muon_alct_bxn,
0127                             0,
0128                             bits.MPC_Muon0_clct_bx0,
0129                             0,
0130                             0,
0131                             CSCCorrelatedLCTDigi::Version::Run3,
0132                             bits.MPC_Muon0_clct_QuarterStrip,
0133                             bits.MPC_Muon0_clct_EighthStrip,
0134                             run3_pattern,
0135                             slope);
0136   digi.setHMT(hmt);
0137   result.push_back(digi);
0138   /// for the first MPC word:
0139   strip = bits.MPC_Muon1_clct_key_halfstrip;  //this goes from 0-223
0140   slope = (bits.MPC_Muon1_clct_bend_low & 0x7) | (bits.MPC_Muon1_clct_bend_bit4 << 3);
0141   run2_pattern = run2_pattern_lookup_tbl[bits.MPC_Muon1_clct_LR][slope];
0142   run3_pattern = run3_pattern_pair.first & 0x7;
0143 
0144   digi = CSCCorrelatedLCTDigi(2,
0145                               bits.MPC_Muon1_lct_vpf,
0146                               bits.MPC_Muon1_lct_quality,
0147                               bits.MPC_Muon1_alct_key_wire,
0148                               strip,
0149                               run2_pattern,
0150                               bits.MPC_Muon1_clct_LR,
0151                               bits.MPC_Muon_alct_bxn,
0152                               0,
0153                               bits.MPC_Muon1_clct_bx0,
0154                               0,
0155                               0,
0156                               CSCCorrelatedLCTDigi::Version::Run3,
0157                               bits.MPC_Muon1_clct_QuarterStrip,
0158                               bits.MPC_Muon1_clct_EighthStrip,
0159                               run3_pattern,
0160                               slope);
0161   digi.setHMT(hmt);
0162   result.push_back(digi);
0163   return result;
0164 }
0165 
0166 CSCShowerDigi CSCTMBHeader2020_GEM::showerDigi(uint32_t idlayer) const {
0167   unsigned hmt_bits = bits.MPC_Muon_HMT_bit0 | (bits.MPC_Muon_HMT_high << 1);  // HighMultiplicityTrigger bits
0168   uint16_t cscid = bits.cscID;  // ??? What is 4-bits CSC Id in CSshowerDigi
0169   //L1A_TMB_WINDOW is not included in below formula
0170   //correct version:  CSCConstants::LCT_CENTRAL_BX - bits.pop_l1a_match_win + L1A_TMB_WINDOW/2;
0171   // same for anode HMT and cathode HMT. offline analysis would take care of this
0172   uint16_t bx = CSCConstants::LCT_CENTRAL_BX - bits.pop_l1a_match_win;
0173   //LCTshower with showerType = 3.  comparatorNHits from hmt_nhits() and wireNHits is not available
0174   CSCShowerDigi result(hmt_bits & 0x3,
0175                        (hmt_bits >> 2) & 0x3,
0176                        cscid,
0177                        bx,
0178                        CSCShowerDigi::ShowerType::kLCTShower,
0179                        0,
0180                        hmt_nhits());  // 2-bits intime, 2-bits out of time
0181   return result;
0182 }
0183 
0184 CSCShowerDigi CSCTMBHeader2020_GEM::anodeShowerDigi(uint32_t idlayer) const {
0185   uint16_t cscid = bits.cscID;
0186   uint16_t bx = CSCConstants::LCT_CENTRAL_BX - bits.pop_l1a_match_win;
0187   //ALCT shower with showerType = 1. wireNHits is not available from unpack data
0188   CSCShowerDigi result(
0189       bits.anode_hmt & 0x3, 0, cscid, bx, CSCShowerDigi::ShowerType::kALCTShower, 0, 0);  // 2-bits intime, no out of time
0190   return result;
0191 }
0192 
0193 CSCShowerDigi CSCTMBHeader2020_GEM::cathodeShowerDigi(uint32_t idlayer) const {
0194   uint16_t cscid = bits.cscID;
0195   uint16_t bx = CSCConstants::LCT_CENTRAL_BX - bits.pop_l1a_match_win - bits.hmt_match_win + 3;
0196   //CLCT shower with showerType = 2. comparatorNHits from hmt_nhits()
0197   CSCShowerDigi result(bits.cathode_hmt & 0x3,
0198                        0,
0199                        cscid,
0200                        bx,
0201                        CSCShowerDigi::ShowerType::kCLCTShower,
0202                        0,
0203                        hmt_nhits());  // 2-bits intime, no out of time
0204   return result;
0205 }
0206 
0207 void CSCTMBHeader2020_GEM::addALCT0(const CSCALCTDigi& digi) {
0208   throw cms::Exception("In CSC TMBHeaderFormat 2007, ALCTs belong in  ALCT header");
0209 }
0210 
0211 void CSCTMBHeader2020_GEM::addALCT1(const CSCALCTDigi& digi) {
0212   throw cms::Exception("In CSC TMBHeaderFormat 2007, ALCTs belong in  ALCT header");
0213 }
0214 
0215 void CSCTMBHeader2020_GEM::addCLCT0(const CSCCLCTDigi& digi) {
0216   unsigned halfStrip = digi.getKeyStrip();
0217   unsigned pattern = digi.getRun3Pattern();
0218   bits.clct0_valid = digi.isValid();
0219   bits.clct0_quality = digi.getQuality();
0220   bits.clct0_shape = pattern;
0221   // first 7 bits of halfstrip
0222   bits.clct0_key_low = halfStrip & (0x7F);
0223   // most-significant (8th) bit
0224   bits.clct0_key_high = (halfStrip >> 7) & (0x1);
0225   bits.clct_bxn = digi.getBX();
0226   bits.bxnPreTrigger = digi.getFullBX();
0227   bits.clct0_comparator_code = digi.getCompCode();
0228   bits.clct0_xky = (digi.getEighthStripBit() & 0x1) + ((digi.getQuartStripBit() & 0x1) << 1);
0229   bits.clct0_LR_bend = digi.getBend();
0230   bits.clct0_slope = digi.getSlope();
0231 }
0232 
0233 void CSCTMBHeader2020_GEM::addCLCT1(const CSCCLCTDigi& digi) {
0234   unsigned halfStrip = digi.getKeyStrip();
0235   unsigned pattern = digi.getRun3Pattern();
0236   bits.clct1_valid = digi.isValid();
0237   bits.clct1_quality = digi.getQuality();
0238   bits.clct1_shape = pattern;
0239   // first 7 bits of halfstrip
0240   bits.clct1_key_low = halfStrip & (0x7F);
0241   // most-significant (8th) bit
0242   bits.clct1_key_high = (halfStrip >> 7) & (0x1);
0243   // There is just one BX field common for CLCT0 and CLCT1 (since both
0244   // are latched at the same BX); set it in addCLCT0().
0245   bits.bxnPreTrigger = digi.getFullBX();
0246   bits.clct1_comparator_code = digi.getCompCode();
0247   bits.clct1_xky = (digi.getEighthStripBit() & 0x1) + ((digi.getQuartStripBit() & 0x1) << 1);
0248   bits.clct1_LR_bend = digi.getBend();
0249   bits.clct1_slope = digi.getSlope();
0250 }
0251 
0252 void CSCTMBHeader2020_GEM::addCorrelatedLCT0(const CSCCorrelatedLCTDigi& digi) {
0253   bits.MPC_Muon0_lct_vpf = digi.isValid();
0254   bits.MPC_Muon0_alct_key_wire = digi.getKeyWG();
0255   bits.MPC_Muon0_clct_key_halfstrip = digi.getStrip(2) & 0xFF;
0256   bits.MPC_Muon0_clct_QuarterStrip = digi.getQuartStripBit() & 0x1;
0257   bits.MPC_Muon0_clct_EighthStrip = digi.getEighthStripBit() & 0x1;
0258   bits.MPC_Muon0_lct_quality = digi.getQuality() & 0x7;
0259 
0260   // To restore 5-bits Run3 CLCT Pattern ID first assume and set pattern ID = LCT0 Run3 pattern
0261   uint16_t run3_pattern = digi.getRun3Pattern();
0262   bits.MPC_Muon_clct_pattern_low = run3_pattern & 0xF;
0263   bits.MPC_Muon_clct_pattern_bit5 = (run3_pattern >> 4) & 0x1;
0264   bits.MPC_Muon0_clct_bend_low = digi.getSlope() & 0x7;
0265   bits.MPC_Muon0_clct_bend_bit4 = (digi.getSlope() >> 3) & 0x1;
0266   bits.MPC_Muon0_clct_LR = digi.getBend() & 0x1;
0267   bits.MPC_Muon_HMT_bit0 = digi.getHMT() & 0x1;
0268   bits.MPC_Muon_HMT_high = (digi.getHMT() >> 1) & 0x7;
0269   bits.MPC_Muon_alct_bxn = digi.getBX();
0270   bits.MPC_Muon0_clct_bx0 = digi.getBX0();
0271 }
0272 
0273 void CSCTMBHeader2020_GEM::addCorrelatedLCT1(const CSCCorrelatedLCTDigi& digi) {
0274   bits.MPC_Muon1_lct_vpf = digi.isValid();
0275   bits.MPC_Muon1_alct_key_wire = digi.getKeyWG();
0276   bits.MPC_Muon1_clct_key_halfstrip = digi.getStrip(2) & 0xFF;
0277   bits.MPC_Muon1_clct_QuarterStrip = digi.getQuartStripBit() & 0x1;
0278   bits.MPC_Muon1_clct_EighthStrip = digi.getEighthStripBit() & 0x1;
0279   bits.MPC_Muon1_lct_quality = digi.getQuality() & 0x7;
0280 
0281   // To restore 5-bits Run3 CLCT Pattern ID assume that LCT0 pattern ID is already processed
0282   // and combine LCT1 Run3 pattern to set final 5-bit pattern ID
0283   if (digi.isValid()) {
0284     uint16_t clct_pattern_id = bits.MPC_Muon_clct_pattern_low | (bits.MPC_Muon_clct_pattern_bit5 << 4);
0285     uint16_t run3_pattern = digi.getRun3Pattern();
0286     clct_pattern_id = (clct_pattern_id + (run3_pattern + 1) * 5) % 30;
0287     bits.MPC_Muon_clct_pattern_low = clct_pattern_id & 0xF;
0288     bits.MPC_Muon_clct_pattern_bit5 = (clct_pattern_id >> 4) & 0x1;
0289   }
0290   bits.MPC_Muon1_clct_bend_low = digi.getSlope() & 0x7;
0291   bits.MPC_Muon1_clct_bend_bit4 = (digi.getSlope() >> 3) & 0x1;
0292   bits.MPC_Muon1_clct_LR = digi.getBend() & 0x1;
0293   bits.MPC_Muon_HMT_bit0 = digi.getHMT() & 0x1;
0294   bits.MPC_Muon_HMT_high = (digi.getHMT() >> 1) & 0x7;
0295   bits.MPC_Muon_alct_bxn = digi.getBX();
0296   bits.MPC_Muon1_clct_bx0 = digi.getBX0();
0297 }
0298 
0299 void CSCTMBHeader2020_GEM::addShower(const CSCShowerDigi& digi) {
0300   uint16_t hmt_bits = (digi.bitsInTime() & 0x3) + ((digi.bitsOutOfTime() & 0x3) << 2);
0301   //not valid LCT shower, then in-time bits must be 0
0302   if (not digi.isValid())
0303     hmt_bits = ((digi.bitsOutOfTime() & 0x3) << 2);
0304   bits.MPC_Muon_HMT_bit0 = hmt_bits & 0x1;
0305   bits.MPC_Muon_HMT_high = (hmt_bits >> 1) & 0x7;
0306   //to keep pop_l1a_match_win
0307   if (digi.isValid())
0308     bits.pop_l1a_match_win = CSCConstants::LCT_CENTRAL_BX - digi.getBX();
0309   else
0310     bits.pop_l1a_match_win = 3;  //default value
0311 }
0312 
0313 void CSCTMBHeader2020_GEM::addAnodeShower(const CSCShowerDigi& digi) {
0314   uint16_t hmt_bits = digi.bitsInTime() & 0x3;
0315   if (not digi.isValid())
0316     hmt_bits = 0;
0317   bits.anode_hmt = hmt_bits;
0318   if (not(bits.MPC_Muon_HMT_bit0 or bits.MPC_Muon_HMT_high) and digi.isValid())
0319     bits.pop_l1a_match_win = CSCConstants::LCT_CENTRAL_BX - digi.getBX();
0320   else if (not(digi.isValid()))
0321     bits.pop_l1a_match_win = 3;  //default value
0322 }
0323 
0324 void CSCTMBHeader2020_GEM::addCathodeShower(const CSCShowerDigi& digi) {
0325   uint16_t hmt_bits = digi.bitsInTime() & 0x3;
0326   if (not digi.isValid())
0327     hmt_bits = 0;
0328   bits.cathode_hmt = hmt_bits;
0329   bits.hmt_nhits_bit0 = digi.getComparatorNHits() & 0x1;
0330   bits.hmt_nhits_bit1 = (digi.getComparatorNHits() >> 1) & 0x1;
0331   bits.hmt_nhits_bits_high = (digi.getComparatorNHits() >> 2) & 0x1F;
0332   if (bits.MPC_Muon_HMT_bit0 or bits.MPC_Muon_HMT_high or bits.anode_hmt) {
0333     //pop_l1a_match_win is assigned
0334     bits.hmt_match_win = CSCConstants::LCT_CENTRAL_BX - bits.pop_l1a_match_win + 3 - digi.getBX();
0335   } else if (digi.isValid()) {
0336     bits.pop_l1a_match_win = 3;  //default value
0337     bits.hmt_match_win = CSCConstants::LCT_CENTRAL_BX - digi.getBX();
0338   } else {
0339     bits.pop_l1a_match_win = 3;  //default value
0340     bits.hmt_match_win = 0;      //no HMT case
0341   }
0342 }
0343 
0344 void CSCTMBHeader2020_GEM::print(std::ostream& os) const {
0345   os << "...............(O)TMB2020 ME11 GEM/CCLUT/HMT Header.................."
0346      << "\n";
0347   os << std::hex << "BOC LINE " << bits.b0cline << " EOB " << bits.e0bline << "\n";
0348   os << std::hex << "FW revision: 0x" << bits.firmRevCode << "\n";
0349   os << std::dec << "fifoMode = " << bits.fifoMode << ", nTBins = " << bits.nTBins << "\n";
0350   os << "boardID = " << bits.boardID << ", cscID = " << bits.cscID << "\n";
0351   os << "l1aNumber = " << bits.l1aNumber << ", bxnCount = " << bits.bxnCount << "\n";
0352   os << "trigSourceVect = " << bits.trigSourceVect << ", run3_trig_df = " << bits.run3_trig_df
0353      << ", gem_enable = " << bits.gem_enable << ", gem_csc_bend_enable = " << bits.gem_csc_bend_enable
0354      << ", activeCFEBs = 0x" << std::hex << (bits.activeCFEBs | (bits.activeCFEBs_2 << 5)) << ", readCFEBs = 0x"
0355      << std::hex << (bits.readCFEBs | (bits.readCFEBs_2 << 5)) << std::dec << "\n";
0356   os << "bxnPreTrigger = " << bits.bxnPreTrigger << "\n";
0357   os << "ALCT location in CLCT window " << bits.matchWin << " L1A location in TMB window " << bits.pop_l1a_match_win
0358      << " ALCT in cathde HMT window " << bits.hmt_match_win << "\n";
0359   os << "tmbMatch = " << bits.tmbMatch << " alctOnly = " << bits.alctOnly << " clctOnly = " << bits.clctOnly << "\n";
0360 
0361   os << "readoutCounter: " << std::dec << bits.readoutCounter << ", buf_q_ovf: " << bits.stackOvf
0362      << ", sync_err: " << bits.syncError << ", has_buf: " << bits.hasBuf << ", buf_stalled: " << bits.bufFull << "\n";
0363   os << "r_wr_buf_adr: 0x" << std::hex << bits.r_wr_buf_adr << ", r_wr_buf_ready: " << bits.r_wr_buf_ready
0364      << ", wr_buf_ready: " << bits.wr_buf_ready << ", buf_q_full: " << bits.buf_q_full
0365      << ", buf_q_empty: " << bits.buf_q_empty << ",\nr_buf_fence_dist: 0x" << bits.r_buf_fence_dist
0366      << ", buf_q_ovf_err: " << bits.buf_q_ovf_err << ", buf_q_udf_err: " << bits.buf_q_udf_err
0367      << ", buf_q_adr_err: " << bits.buf_q_adr_err << ", buf_stalled: " << bits.buf_stalled << ",\nbuf_fence_cnt: 0x"
0368      << bits.buf_fence_cnt << ", reverse_hs_csc: " << bits.reverse_hs_csc
0369      << ", reverse_hs_me1a: " << bits.reverse_hs_me1a << ", reverse_hs_me1b: " << bits.reverse_hs_me1b << std::dec
0370      << "\n";
0371   os << "CLCT Words:\n"
0372      << " bits.clct0_valid = " << bits.clct0_valid << " bits.clct0_shape = " << bits.clct0_shape
0373      << " bits.clct0_quality = " << bits.clct0_quality
0374      << " halfstrip = " << (bits.clct0_key_low + (bits.clct0_key_high << 7)) << "\n";
0375   os << " bits.clct0_xky = " << bits.clct0_xky << " bits.clct0_comparator_code = " << bits.clct0_comparator_code
0376      << " bits.clct0_LR_bend = " << bits.clct0_LR_bend << " bits.clct0_slope = " << bits.clct0_slope << "\n";
0377 
0378   os << " bits.clct1_valid = " << bits.clct1_valid << " bits.clct1_shape = " << bits.clct1_shape
0379      << " bits.clct1_quality = " << bits.clct1_quality
0380      << " halfstrip = " << (bits.clct1_key_low + (bits.clct1_key_high << 7)) << "\n";
0381   os << " bits.clct1_xky = " << bits.clct1_xky << " bits.clct1_comparator_code = " << bits.clct1_comparator_code
0382      << " bits.clct1_LR_bend = " << bits.clct1_LR_bend << " bits.clct1_slope = " << bits.clct1_slope << "\n";
0383 
0384   os << "MPC Words:\n"
0385      << " LCT0 valid = " << bits.MPC_Muon0_lct_vpf << " key WG = " << bits.MPC_Muon0_alct_key_wire
0386      << " key halfstrip = " << bits.MPC_Muon0_clct_key_halfstrip
0387      << " 1/4strip flag = " << bits.MPC_Muon0_clct_QuarterStrip
0388      << " 1/8strip flag = " << bits.MPC_Muon0_clct_EighthStrip << "\n"
0389      << " quality = " << bits.MPC_Muon0_lct_quality
0390      << " slope/bend = " << ((bits.MPC_Muon0_clct_bend_low & 0x7) | (bits.MPC_Muon0_clct_bend_bit4 << 3))
0391      << " L/R bend = " << bits.MPC_Muon0_clct_LR << "\n";
0392 
0393   os << " LCT1 valid = " << bits.MPC_Muon1_lct_vpf << " key WG = " << bits.MPC_Muon1_alct_key_wire
0394      << " key halfstrip = " << bits.MPC_Muon1_clct_key_halfstrip
0395      << " 1/4strip flag = " << bits.MPC_Muon1_clct_QuarterStrip
0396      << " 1/8strip flag = " << bits.MPC_Muon1_clct_EighthStrip << "\n"
0397      << " quality = " << bits.MPC_Muon1_lct_quality
0398      << " slope/bend = " << ((bits.MPC_Muon1_clct_bend_low & 0x7) | (bits.MPC_Muon1_clct_bend_bit4 << 3))
0399      << " L/R bend = " << bits.MPC_Muon1_clct_LR << "\n";
0400 
0401   os << " clct_5bit_pattern_id = " << (bits.MPC_Muon_clct_pattern_low | (bits.MPC_Muon_clct_pattern_bit5 << 4))
0402      << " HMT = " << (bits.MPC_Muon_HMT_bit0 | (bits.MPC_Muon_HMT_high << 1)) << ", alctHMT = " << bits.anode_hmt
0403      << ", clctHMT = " << bits.cathode_hmt << " cathode nhits " << hmt_nhits() << "\n";
0404 
0405   // os << "..................CLCT....................." << "\n";
0406   os << "GEM Data:\n"
0407      << " gem_enabled_fibers = 0x" << std::hex << gem_enabled_fibers() << std::dec
0408      << " gem_fifo_tbins = " << gem_fifo_tbins() << " gem_fifo_pretrig = " << gem_fifo_pretrig()
0409      << " gem_zero_suppress = " << gem_zero_suppress() << " gem_csc_bend_enable = " << bits.gem_csc_bend_enable
0410      << " gem_sync_dataword = 0x" << std::hex << gem_sync_dataword() << " gem_timing_dataword = 0x" << std::hex
0411      << gem_timing_dataword() << std::dec << "\n";
0412   os << " gem num_copad: " << bits.num_copad << ", gem_delay: " << bits.gem_delay
0413      << ", gem_clct_win: " << bits.gem_clct_win << ", alct_gem_win: " << bits.alct_gem_win << "\n";
0414 }