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File indexing completed on 2024-04-06 12:19:34
0001 #ifndef L1Trigger_CSCTriggerPrimitives_CSCMotherboard_h 0002 #define L1Trigger_CSCTriggerPrimitives_CSCMotherboard_h 0003 0004 /** \class CSCMotherboard 0005 * 0006 * Correlates anode and cathode LCTs from the same chamber. 0007 * 0008 * When the Trigger MotherBoard (TMB) is instantiated it instantiates an ALCT 0009 * and CLCT board. The MotherBoard takes up to two LCTs from each anode 0010 * and cathode LCT card and combines them into a single Correlated LCT. 0011 * The output is up to two Correlated LCTs. 0012 * 0013 * It can be run in either a test mode, where the arguments are a collection 0014 * of wire times and arrays of halfstrip times, or 0015 * for general use, with wire digi and comparator digi collections as 0016 * arguments. In the latter mode, the wire & strip info is passed on the 0017 * LCTProcessors, where it is decoded and converted into a convenient form. 0018 * After running the anode and cathode LCTProcessors, TMB correlates the 0019 * anode and cathode LCTs. At present, it simply matches the best CLCT 0020 * with the best ALCT; perhaps a better algorithm will be determined in 0021 * the future. The MotherBoard then determines a few more numbers (such as 0022 * quality and pattern) from the ALCT and CLCT information, and constructs 0023 * two correlated LCT "digis". 0024 * 0025 * \author Benn Tannenbaum 28 August 1999 benn@physics.ucla.edu 0026 * 0027 * Based on code by Nick Wisniewski (nw@its.caltech.edu) and a framework 0028 * by Darin Acosta (acosta@phys.ufl.edu). 0029 * 0030 * Numerous later improvements by Jason Mumford and Slava Valuev (see cvs 0031 * in ORCA). 0032 * Porting from ORCA by S. Valuev (Slava.Valuev@cern.ch), May 2006. 0033 * 0034 * Extended for Run-3 and Phase-2 by Vadim Khotilovich, Tao Huang, Sven Dildick and Giovanni Mocellin 0035 */ 0036 0037 #include "L1Trigger/CSCTriggerPrimitives/interface/CSCAnodeLCTProcessor.h" 0038 #include "L1Trigger/CSCTriggerPrimitives/interface/CSCCathodeLCTProcessor.h" 0039 #include "L1Trigger/CSCTriggerPrimitives/interface/LCTContainer.h" 0040 #include "L1Trigger/CSCTriggerPrimitives/interface/CSCALCTCrossCLCT.h" 0041 #include "L1Trigger/CSCTriggerPrimitives/interface/CSCUpgradeAnodeLCTProcessor.h" 0042 #include "L1Trigger/CSCTriggerPrimitives/interface/CSCUpgradeCathodeLCTProcessor.h" 0043 #include "L1Trigger/CSCTriggerPrimitives/interface/LCTQualityAssignment.h" 0044 #include "DataFormats/CSCDigi/interface/CSCCorrelatedLCTDigi.h" 0045 #include "DataFormats/CSCDigi/interface/CSCShowerDigi.h" 0046 #include "CondFormats/CSCObjects/interface/CSCL1TPLookupTableCCLUT.h" 0047 #include "CondFormats/CSCObjects/interface/CSCL1TPLookupTableME21ILT.h" 0048 #include "CondFormats/CSCObjects/interface/CSCL1TPLookupTableME11ILT.h" 0049 0050 class CSCMotherboard : public CSCBaseboard { 0051 public: 0052 /** Normal constructor. */ 0053 CSCMotherboard(unsigned endcap, 0054 unsigned station, 0055 unsigned sector, 0056 unsigned subsector, 0057 unsigned chamber, 0058 CSCBaseboard::Parameters& conf); 0059 0060 /** Default destructor. */ 0061 ~CSCMotherboard() override = default; 0062 0063 struct RunContext { 0064 const CSCGeometry* cscGeometry_; 0065 // access to lookup tables via eventsetup 0066 const CSCL1TPLookupTableCCLUT* lookupTableCCLUT_; 0067 const CSCL1TPLookupTableME11ILT* lookupTableME11ILT_; 0068 const CSCL1TPLookupTableME21ILT* lookupTableME21ILT_; 0069 /** Set configuration parameters obtained via EventSetup mechanism. */ 0070 const CSCDBL1TPParameters* parameters_; 0071 }; 0072 0073 /** Run function for normal usage. Runs cathode and anode LCT processors, 0074 takes results and correlates into CorrelatedLCT. */ 0075 void run(const CSCWireDigiCollection* wiredc, const CSCComparatorDigiCollection* compdc, const RunContext&); 0076 0077 /* 0078 Returns vector of good correlated LCTs in the read-out time window. 0079 LCTs in the BX window [early_tbins,...,late_tbins] are considered 0080 good for physics. The central LCT BX is time bin 8. 0081 - tmb_l1a_window_size = 7 (Run-1, Run-2) -> [5, 6, 7, 8, 9, 10, 11] 0082 - tmb_l1a_window_size = 5 (Run-3) -> [6, 7, 8, 9, 10] 0083 - tmb_l1a_window_size = 3 (Run-4?) -> [7, 8, 9] 0084 0085 Note, this function does not have an exact counterpart in the 0086 firmware. The reason is that the DAQ of LCTs is not correctly 0087 simulated in CMSSW - at least the simulation of the L1-accept. 0088 So, this function corresponds to both the trigger path and the 0089 DAQ path in the firmware. In general, the function will return 0090 LCTs that would not be used in the OMTF or EMTF emulator, 0091 because they are out-of-time relative for tracking purposes. For 0092 instance an LCT with BX5 would be read out by the DAQ, but would 0093 likely not be used by the EMTF. 0094 */ 0095 virtual std::vector<CSCCorrelatedLCTDigi> readoutLCTs() const; 0096 0097 // LCT selection: at most 2 in each BX 0098 void selectLCTs(); 0099 0100 /** Returns shower bits */ 0101 std::vector<CSCShowerDigi> readoutShower() const; 0102 0103 /** Anode LCT processor. */ 0104 std::unique_ptr<CSCAnodeLCTProcessor> alctProc; 0105 0106 /** Cathode LCT processor. */ 0107 std::unique_ptr<CSCCathodeLCTProcessor> clctProc; 0108 0109 // VK: change to protected, to allow inheritance 0110 protected: 0111 std::tuple<std::vector<CSCALCTDigi>, std::vector<CSCCLCTDigi>> runCommon(const CSCWireDigiCollection* wiredc, 0112 const CSCComparatorDigiCollection* compdc, 0113 const RunContext& context); 0114 0115 // helper function to return ALCT/CLCT with correct central BX 0116 CSCALCTDigi getBXShiftedALCT(const CSCALCTDigi&) const; 0117 CSCCLCTDigi getBXShiftedCLCT(const CSCCLCTDigi&) const; 0118 0119 /** Configuration parameters. */ 0120 unsigned int match_trig_window_size() const { return match_trig_window_size_; } 0121 unsigned int match_trig_enable() const { return match_trig_enable_; } 0122 0123 int preferred_bx_match(unsigned int index) const { return preferred_bx_match_[index]; } 0124 bool sort_clct_bx() const { return sort_clct_bx_; } 0125 0126 /*sort CLCT by quality+bending and if CLCTs from different BX have 0127 same quality+bending, then rank CLCT by timing 0128 */ 0129 void sortCLCTByQualBend(int alct_bx, std::vector<unsigned>& clctBxVector); 0130 0131 bool doesALCTCrossCLCT(const CSCALCTDigi&, const CSCCLCTDigi&) const; 0132 0133 // CLCT pattern number: encodes the pattern number itself 0134 unsigned int encodePattern(const int clctPattern) const; 0135 0136 /** Container with all LCTs prior to sorting and selecting. */ 0137 LCTContainer allLCTs_; 0138 0139 /* quality assignment */ 0140 std::unique_ptr<LCTQualityAssignment> qualityAssignment_; 0141 0142 private: 0143 /** Clears correlated LCT and passes clear signal on to cathode and anode 0144 LCT processors. */ 0145 void clear(); 0146 0147 /** Make sure that the parameter values are within the allowed range. */ 0148 void checkConfigParameters(); 0149 0150 /* 0151 For valid ALCTs in the trigger time window, look for CLCTs within the 0152 match-time window. Valid CLCTs are matched in-time. If a match was found 0153 for the best ALCT and best CLCT, also the second best ALCT and second 0154 best CLCT are sent to a correlation function "correlateLCTs" that will 0155 make the best-best pair and second-second pair (if applicable). 0156 */ 0157 void matchALCTCLCT(); 0158 0159 /* 0160 This function matches maximum two ALCTs with maximum two CLCTs in 0161 a bunch crossing. The best ALCT is considered the one with the highest 0162 quality in a BX. Similarly for the best CLCT. If there is just one 0163 ALCT and just one CLCT, the correlated LCT is made from those two 0164 components. If there are exactly two ALCTs and two CLCTs, the best 0165 LCT and second best LCT are formed from the best ALCT-CLCT combination 0166 and the second best ALCT-CLCT combination. In case there is missing 0167 information (e.g. second best ALCT, but no second best CLCT), information 0168 is copied over. 0169 */ 0170 void correlateLCTs(const CSCALCTDigi& bestALCT, 0171 const CSCALCTDigi& secondALCT, 0172 const CSCCLCTDigi& bestCLCT, 0173 const CSCCLCTDigi& secondCLCT, 0174 CSCCorrelatedLCTDigi& bLCT, 0175 CSCCorrelatedLCTDigi& sLCT, 0176 int type) const; 0177 0178 /* 0179 This method calculates all the TMB words and then passes them to the 0180 constructor of correlated LCTs. The LCT data members are filled with 0181 information from the ALCT-CLCT combination. 0182 */ 0183 void constructLCTs( 0184 const CSCALCTDigi& aLCT, const CSCCLCTDigi& cLCT, int type, int trknmb, CSCCorrelatedLCTDigi& lct) const; 0185 0186 /* 0187 These functions copy valid ALCT/CLCT information to invalid the ALCT/CLCT 0188 if present, so that we always construct the maximum number of valid LCTs 0189 */ 0190 void copyValidToInValidALCT(CSCALCTDigi&, CSCALCTDigi&) const; 0191 void copyValidToInValidCLCT(CSCCLCTDigi&, CSCCLCTDigi&) const; 0192 0193 /** Dump TMB/MPC configuration parameters. */ 0194 void dumpConfigParams() const; 0195 0196 /* match cathode shower and anode shower with and/or logic */ 0197 void matchShowers(CSCShowerDigi* anode_showers, CSCShowerDigi* cathode_showers, bool andlogic); 0198 0199 /* encode high multiplicity bits for Run-3 exotic triggers */ 0200 void encodeHighMultiplicityBits(); 0201 0202 void setConfigParameters(const CSCDBL1TPParameters* conf); 0203 0204 /* Container with sorted and selected LCTs */ 0205 std::vector<CSCCorrelatedLCTDigi> lctV; 0206 0207 /* 0208 Preferential index array in matching window, relative to the ALCT BX. 0209 Where the central match BX goes first, 0210 then the closest early, the closest late, etc. 0211 */ 0212 std::vector<int> preferred_bx_match_; 0213 // encode special bits for high-multiplicity triggers 0214 std::vector<unsigned> showerSource_; 0215 0216 /* quality control */ 0217 std::unique_ptr<LCTQualityControl> qualityControl_; 0218 0219 /* 0220 Helper class to check if an ALCT intersects with a CLCT. Normally 0221 this class should not be used. It is left in the code as a potential 0222 improvement for ME1/1 when unphysical LCTs are not desired. This 0223 function is not implemented in the firmware. 0224 */ 0225 std::unique_ptr<CSCALCTCrossCLCT> cscOverlap_; 0226 0227 CSCShowerDigi showers_[CSCConstants::MAX_LCT_TBINS]; 0228 0229 unsigned int mpc_block_me1a_; 0230 unsigned int alct_trig_enable_, clct_trig_enable_, match_trig_enable_; 0231 unsigned int match_trig_window_size_, tmb_l1a_window_size_; 0232 0233 /** Phase2: separate handle for early time bins */ 0234 int early_tbins; 0235 0236 // encode special bits for high-multiplicity triggers 0237 unsigned thisShowerSource_; 0238 0239 unsigned minbx_readout_; 0240 unsigned maxbx_readout_; 0241 0242 /** Phase2: whether to not reuse CLCTs that were used by previous matching ALCTs */ 0243 bool drop_used_clcts; 0244 0245 /** Phase2: whether to readout only the earliest two LCTs in readout window */ 0246 bool readout_earliest_2; 0247 0248 // when set to true, ignore CLCTs found in later BX's 0249 bool match_earliest_clct_only_; 0250 0251 bool ignoreAlctCrossClct_; 0252 0253 /* sort CLCT by bx if true, otherwise sort CLCT by quality+bending */ 0254 bool sort_clct_bx_; 0255 0256 /** Default values of configuration parameters. */ 0257 static const unsigned int def_mpc_block_me1a; 0258 static const unsigned int def_alct_trig_enable, def_clct_trig_enable; 0259 static const unsigned int def_match_trig_enable, def_match_trig_window_size; 0260 static const unsigned int def_tmb_l1a_window_size; 0261 }; 0262 #endif
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