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0020 #ifndef L1Trigger_DTTriggerPhase2_constants_h
0021 #define L1Trigger_DTTriggerPhase2_constants_h
0022 #include <cstdint>
0023 #include <vector>
0024 #include <cmath>
0025
0026
0027
0028
0029
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0031
0032
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0034
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0037
0038
0039
0040
0041 namespace cmsdt {
0042
0043
0044 enum MP_QUALITY { NOPATH = 0, LOWQ = 1, CLOWQ = 2, HIGHQ = 3, CHIGHQ = 4, LOWLOWQ = 6, HIGHLOWQ = 7, HIGHHIGHQ = 8 };
0045
0046
0047 enum LATERAL_CASES { LEFT = 0, RIGHT, NONE };
0048
0049 enum RPC_QUALITY { NORPC = 0, RPC_TIME, RPC_ONLY, RPC_HIT, RPC_CONFIRM, RPC_ASSOCIATE };
0050
0051 struct metaPrimitive {
0052 metaPrimitive(uint32_t id,
0053 double t,
0054 double pos,
0055 double tan,
0056 double ph,
0057 double phb,
0058 double ph_cmssw,
0059 double phb_cmssw,
0060 double chi,
0061 int q,
0062 int w1,
0063 int t1,
0064 int l1,
0065 int w2,
0066 int t2,
0067 int l2,
0068 int w3,
0069 int t3,
0070 int l3,
0071 int w4,
0072 int t4,
0073 int l4,
0074 int w5 = 0,
0075 int t5 = -1,
0076 int l5 = 0,
0077 int w6 = 0,
0078 int t6 = -1,
0079 int l6 = 0,
0080 int w7 = 0,
0081 int t7 = -1,
0082 int l7 = 0,
0083 int w8 = 0,
0084 int t8 = -1,
0085 int l8 = 0,
0086 int idx = 0,
0087 int rpc = 0)
0088 : rawId(id),
0089 t0(t),
0090 x(pos),
0091 tanPhi(tan),
0092 phi(ph),
0093 phiB(phb),
0094 phi_cmssw(ph_cmssw),
0095 phiB_cmssw(phb_cmssw),
0096 chi2(chi),
0097 quality(q),
0098 wi1(w1),
0099 tdc1(t1),
0100 lat1(l1),
0101 wi2(w2),
0102 tdc2(t2),
0103 lat2(l2),
0104 wi3(w3),
0105 tdc3(t3),
0106 lat3(l3),
0107 wi4(w4),
0108 tdc4(t4),
0109 lat4(l4),
0110 wi5(w5),
0111 tdc5(t5),
0112 lat5(l5),
0113 wi6(w6),
0114 tdc6(t6),
0115 lat6(l6),
0116 wi7(w7),
0117 tdc7(t7),
0118 lat7(l7),
0119 wi8(w8),
0120 tdc8(t8),
0121 lat8(l8),
0122 index(idx),
0123 rpcFlag(rpc) {}
0124 metaPrimitive()
0125 : rawId(0),
0126 t0(0),
0127 x(0),
0128 tanPhi(0),
0129 phi(0),
0130 phiB(0),
0131 phi_cmssw(0),
0132 phiB_cmssw(0),
0133 chi2(0),
0134 quality(0),
0135 wi1(0),
0136 tdc1(0),
0137 lat1(0),
0138 wi2(0),
0139 tdc2(0),
0140 lat2(0),
0141 wi3(0),
0142 tdc3(0),
0143 lat3(0),
0144 wi4(0),
0145 tdc4(0),
0146 lat4(0),
0147 wi5(0),
0148 tdc5(0),
0149 lat5(0),
0150 wi6(0),
0151 tdc6(0),
0152 lat6(0),
0153 wi7(0),
0154 tdc7(0),
0155 lat7(0),
0156 wi8(0),
0157 tdc8(0),
0158 lat8(0),
0159 index(0),
0160 rpcFlag(0) {}
0161 uint32_t rawId;
0162 double t0;
0163 double x;
0164 double tanPhi;
0165 double phi;
0166 double phiB;
0167 double phi_cmssw;
0168 double phiB_cmssw;
0169 double chi2;
0170 int quality;
0171 int wi1;
0172 int tdc1;
0173 int lat1;
0174 int wi2;
0175 int tdc2;
0176 int lat2;
0177 int wi3;
0178 int tdc3;
0179 int lat3;
0180 int wi4;
0181 int tdc4;
0182 int lat4;
0183 int wi5;
0184 int tdc5;
0185 int lat5;
0186 int wi6;
0187 int tdc6;
0188 int lat6;
0189 int wi7;
0190 int tdc7;
0191 int lat7;
0192 int wi8;
0193 int tdc8;
0194 int lat8;
0195 int index;
0196 int rpcFlag = 0;
0197 };
0198
0199 struct PARTIAL_LATQ_TYPE {
0200 bool latQValid;
0201 int bxValue;
0202 };
0203
0204 struct LATQ_TYPE {
0205 bool valid;
0206 int bxValue;
0207 int invalidateHitIdx;
0208 MP_QUALITY quality;
0209 };
0210
0211 struct bx_sl_vector {
0212 int bx;
0213 std::vector<cmsdt::metaPrimitive> mps;
0214 int sl;
0215 };
0216
0217 enum algo { Standard = 0, PseudoBayes = 1, HoughTrans = 2 };
0218
0219 enum scenario { MC = 0, DATA = 1, SLICE_TEST = 2 };
0220
0221
0222 constexpr int LHC_CLK_FREQ = 25;
0223
0224
0225
0226
0227
0228 constexpr int BX_PER_FRAME = 2;
0229 constexpr int MAX_FRAME_DIF = 8;
0230 constexpr int PATHFINDER_INPUT_HITS_LIMIT = 8;
0231
0232
0233 constexpr int LAT_TOTAL_BITS = 9;
0234 constexpr int LAT_MSB_BITS = 6;
0235 constexpr int TIME_TO_TDC_COUNTS = 32;
0236
0237 constexpr int LAT_P0_4H = 1;
0238 constexpr int LAT_P1_4H = 31;
0239 constexpr int LAT_P2_4H = 40;
0240
0241 constexpr int LAT_P0_3H = 24;
0242 constexpr int LAT_P1_3H = 27;
0243 constexpr int LAT_P2_3H = 30;
0244
0245
0246
0247 constexpr int SL1_CELLS_OFFSET = 48;
0248
0249 constexpr int N_COEFFS = 8;
0250 constexpr int GENERIC_COEFF_WIDTH = 20;
0251 constexpr int WIDTH_FULL_TIME = 17;
0252 constexpr int WIDTH_COARSED_TIME = 12;
0253 constexpr int WIDTH_DIFBX = 5;
0254 constexpr int WIDTH_FULL_POS = 17;
0255 constexpr int WIDTH_FULL_SLOPE = 14;
0256 constexpr int WIDTH_FULL_CHI2 = 16;
0257 constexpr int WIREPOS_WIDTH = 17;
0258 constexpr int WIREPOS_NORM_LSB_IGNORED = 9;
0259 constexpr int WIDTH_POS_SLOPE_CORR = 9;
0260
0261 constexpr int XI_SL_WIDTH = 12;
0262
0263 constexpr int COEFF_WIDTH_SL_T0 = 15;
0264 constexpr int COEFF_WIDTH_SL_POSITION = 18;
0265 constexpr int COEFF_WIDTH_SL2_POSITION = 15;
0266 constexpr int COEFF_WIDTH_SL_SLOPE = 18;
0267
0268 constexpr int PRECISSION_SL_T0 = 13;
0269 constexpr int PRECISSION_SL_POSITION = 13;
0270 constexpr int PRECISSION_SL_SLOPE = 13;
0271
0272 constexpr int PROD_RESIZE_SL_T0 = 28;
0273 constexpr int PROD_RESIZE_SL_POSITION = 30;
0274 constexpr int PROD_RESIZE_SL2_POSITION = 27;
0275 constexpr int PROD_RESIZE_SL_SLOPE = 30;
0276
0277 constexpr int XI_COR_WIDTH = 14;
0278
0279 constexpr int COEFF_WIDTH_COR_T0 = 15;
0280 constexpr int COEFF_WIDTH_COR_POSITION = 15;
0281 constexpr int COEFF_WIDTH_COR_SLOPE = 15;
0282
0283 constexpr int PRECISSION_COR_T0 = 15;
0284 constexpr int PRECISSION_COR_POSITION = 15;
0285 constexpr int PRECISSION_COR_SLOPE = 15;
0286
0287 constexpr int PROD_RESIZE_COR_T0 = 30;
0288 constexpr int PROD_RESIZE_COR_POSITION = 30;
0289 constexpr int PROD_RESIZE_COR_SLOPE = 29;
0290
0291 constexpr int T0_CUT_TOLERANCE = 0;
0292
0293
0294 constexpr int FSEG_T0_BX_LSB = 2;
0295 constexpr int FSEG_T0_DISCARD_LSB = 5;
0296 constexpr int FSEG_T0_SIZE = FSEG_T0_BX_LSB + (5 - FSEG_T0_DISCARD_LSB);
0297 constexpr int FSEG_POS_DISCARD_LSB = 9;
0298 constexpr int FSEG_POS_SIZE = WIDTH_FULL_POS - FSEG_POS_DISCARD_LSB;
0299 constexpr int FSEG_SLOPE_DISCARD_LSB = 9;
0300 constexpr int FSEG_SLOPE_SIZE = WIDTH_FULL_SLOPE - FSEG_SLOPE_DISCARD_LSB;
0301 constexpr int SLFILT_MAX_SEG1T0_TO_SEG2ARRIVAL = 24;
0302
0303
0304 constexpr int MAX_BX_IDX = 3564;
0305
0306
0307 constexpr float MAXDRIFT = 387;
0308 constexpr float MAXDRIFTTDC = 496;
0309
0310
0311 constexpr int CELL_HEIGHT = 13;
0312 constexpr float CELL_SEMIHEIGHT = 6.5;
0313 constexpr int CELL_LENGTH = 42;
0314 constexpr int CELL_SEMILENGTH = 21;
0315
0316 constexpr float DRIFT_SPEED = 0.0542;
0317
0318 constexpr int DRIFT_SPEED_X4 = 889;
0319
0320
0321 constexpr float SLOPE_LSB = ((float)CELL_SEMILENGTH / MAXDRIFTTDC) * (1) / (CELL_SEMIHEIGHT * 16.);
0322
0323
0324 constexpr float VERT_PHI1_PHI3 = 23.5;
0325
0326
0327 constexpr int VERT_PHI1_PHI3_INV = 558;
0328
0329
0330 constexpr int CH_CENTER_TO_MID_SL_X2 = 470;
0331
0332
0333 constexpr int MAX_BX_FOR_COR = 2;
0334
0335
0336 constexpr int MAX_PRIM_PER_BX_FOR_COR = 6;
0337
0338
0339 constexpr int MAX_PRIM_FOR_COR = 12;
0340
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0345
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0348
0349 constexpr int MAX_VALUE_OF_TIME = (LHC_CLK_FREQ * MAX_BX_IDX + 5000);
0350
0351
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0353
0354
0355
0356 constexpr int TOTAL_BTI = 100;
0357 constexpr int NUM_CH_PER_LAYER = 100;
0358 constexpr int NUM_LAYERS = 4;
0359 constexpr int NUM_LATERALITIES = 16;
0360 constexpr int NUM_CELL_COMB = 3;
0361 constexpr int TOTAL_CHANNELS = (NUM_LAYERS * NUM_CH_PER_LAYER);
0362 constexpr int NUM_SUPERLAYERS = 3;
0363 constexpr float PHIRES_CONV = 65536. / 0.5;
0364 constexpr float PHIBRES_CONV = 4096. / 2.;
0365 constexpr int CHI2RES_CONV = 1000000;
0366 constexpr int TDCTIME_REDUCED_SIZE = 10;
0367 constexpr float ZRES_CONV = 65536. / 1500;
0368 constexpr float KRES_CONV = 65536. / 2;
0369
0370
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0378 constexpr int SIZE_SEEKT_BUFFER = 32;
0379
0380
0381 constexpr int NUM_CELLS_PER_BLOCK = 10;
0382
0383
0384
0385
0386
0387
0388 constexpr int PAYLOAD_ENTRIES = 9;
0389
0390
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0393 constexpr int NUM_LAYERS_2SL = 8;
0394 constexpr double PHI_CONV = 0.5235988;
0395
0396 constexpr int BX_SHIFT = 20;
0397 constexpr float Z_SHIFT_MB4 = -1.8;
0398 constexpr float Z_POS_SL = 11.75;
0399 constexpr double X_POS_L3 = 0.65;
0400 constexpr double X_POS_L4 = 1.95;
0401
0402
0403
0404
0405 constexpr int DIV_SHR_BITS_T0 = 16;
0406 constexpr int DIV_SHR_BITS_POS = 21;
0407 constexpr int DIV_SHR_BITS_SLOPE = 21;
0408 constexpr int DIV_SHR_BITS_SLOPE_XHH = 18;
0409
0410 constexpr int INCREASED_RES_T0 = 0;
0411 constexpr int INCREASED_RES_POS = 4;
0412 constexpr int INCREASED_RES_SLOPE = 12;
0413 constexpr int INCREASED_RES_SLOPE_XHH = 4;
0414
0415 constexpr int INCREASED_RES_POS_POW = 16;
0416 constexpr int INCREASED_RES_SLOPE_POW = 4096;
0417
0418
0419 constexpr int DTDD_PREADD = 9;
0420 constexpr int DTDD_MULT = 445;
0421 constexpr int DTDD_SHIFTR_BITS = 13;
0422
0423
0424
0425
0426
0427 constexpr int X_SIZE = 17;
0428 constexpr int TANPSI_SIZE = 14;
0429 constexpr double PHI_SIZE = 1. / 131072;
0430 constexpr double PHIB_SIZE = 4. / 8192;
0431
0432 constexpr int PHI_LUT_ADDR_WIDTH = 11;
0433 constexpr int PHI_B_SHL_BITS = 5;
0434 constexpr int PHI_MULT_SHR_BITS = 9;
0435 constexpr int PHI_LUT_A_BITS = 11;
0436 constexpr int PHI_LUT_B_BITS = 21;
0437
0438 constexpr int PHIB_LUT_ADDR_WIDTH = 9;
0439 constexpr int PHIB_B_SHL_BITS = 6;
0440 constexpr int PHIB_MULT_SHR_BITS = 9;
0441 constexpr int PHIB_LUT_A_BITS = 10;
0442 constexpr int PHIB_LUT_B_BITS = 16;
0443
0444 constexpr int PHI_PHIB_RES_DIFF_BITS = 6;
0445
0446 }
0447
0448 #endif