DTTriggerServerPhi/interface/DTTSCand.h

0001 //-------------------------------------------------
0002 //
0003 /**  \class DTTSCand
0004  *    A Trigger Server Candidate
0005  *
0006  *
0007  *   \author C. Grandi, D. Bonacorsi, S. Marcellini
0008  */
0009 //
0010 //--------------------------------------------------
0011 #ifndef DT_TS_CAND_H
0012 #define DT_TS_CAND_H
0013
0014 //------------------------------------
0015 // Collaborating Class Declarations --
0016 //------------------------------------
0017 class DTConfigTSPhi;
0018
0019 //----------------------
0020 // Base Class Headers --
0021 //----------------------
0022 #include "L1Trigger/DTTraco/interface/DTTracoTrigData.h"
0023 #include "L1Trigger/DTTriggerServerPhi/interface/DTTSS.h"
0024 #include "L1TriggerConfig/DTTPGConfig/interface/BitArray.h"
0025
0026 //---------------
0027 // C++ Headers --
0028 //---------------
0029 #include <string>
0030
0031 //              ---------------------
0032 //              -- Class Interface --
0033 //              ---------------------
0034
0035 class DTTSCand {
0036 public:
0037   /// Constructor
0038   DTTSCand(DTTSS *, const DTTracoTrigData *, int, int);
0039
0040   /// Constructor
0041   DTTSCand();
0042
0043   /// Constructor
0044   DTTSCand(const DTTSCand &tscand);
0045
0046   /// Assignment operator
0047   DTTSCand &operator=(const DTTSCand &tscand);
0048
0049   /// Destructor
0050   ~DTTSCand();
0051
0052   /// Set the quality bits for DTTSS analysis
0053   void setBitsTss();
0054
0055   /// Set the bits for TSM back-up mode
0056   void setBitsBkmod();
0057
0058   /// Set the quality bits for DTTSM analysis
0059   void setBitsTsm();
0060
0061   /// Set the first track bit to second track (used for carry)
0062   // SM sector collector: it becomes bit 14
0063   void setSecondTrack() {
0064     _dataword.set(14);
0065     _isCarry = 1;
0066   }
0067
0068   /// Reset the carry bit
0069   void resetCarry() { _isCarry = 0; }
0070
0071   /// Clear (set to 1) the quality bits (but first/second track bit)
0072   void clearBits() { _dataword.assign(5, 3, 0x7); }
0073
0074   /// Clear (set to 1) all the bits (back-up mode)
0075   void clearBitsBkmod() { _dataword.assign(0, 7, 0xff); }
0076
0077   /// Clear the trigger
0078   inline void clear();
0079
0080   /// Configuration set
0081   inline const DTConfigTSPhi *config() const { return _tss->config(); }
0082
0083   /// Return associated TRACO trigger
0084   inline const DTTracoTrigData *tracoTr() const { return _tctrig; }
0085
0086   /// Retrun the TRACO position inside the TSS
0087   inline int TcPos() const { return _tcPos; }
0088
0089   /// Return the DTTSS
0090   inline DTTSS *tss() const { return _tss; }
0091
0092   /// Return the DTTSS number
0093   inline int tssNumber() const { return _tss->number(); }
0094
0095   /// Return the TRACO number
0096   inline int tracoNumber() const { return _tctrig->tracoNumber(); }
0097
0098   /// Return the first/second track bit
0099   inline int isFirst() const { return _dataword.element(14) == 0; }
0100
0101   /// Return HTRIG/LTRIG bit
0102   inline int isHtrig() const { return _tctrig->pvCode() == 8 || _tctrig->pvCode() == 80; }
0103   /// Return Inner/Outer bit
0104   inline int isInner() const { return _tctrig->pvCode() > 8; }
0105
0106   /// Return correlation bit
0107   inline int isCorr() const { return _tctrig->pvCorr(); }
0108
0109   /// Return the carry bit
0110   inline int isCarry() const { return _isCarry; }
0111
0112   /// Return if HH or HL
0113   inline int isHHorHL() const { return _tctrig->pvCorr() && _tctrig->pvCode() == 80; }
0114
0115   /// Return if LH
0116   inline int isLH() const { return _tctrig->pvCorr() && _tctrig->pvCode() == 8; }
0117
0118   /// Return if LL
0119   inline int isLL() const { return _tctrig->pvCorr() && !(_tctrig->pvCode() == 8) && !(_tctrig->pvCode() == 80); }
0120   /// Return if H inner
0121   inline int isH0() const { return !_tctrig->pvCorr() && _tctrig->pvCode() == 80; }
0122
0123   /// Return if H outer
0124   inline int is0H() const { return !_tctrig->pvCorr() && _tctrig->pvCode() == 8; }
0125
0126   /// Return if L inner
0127   inline int isL0() const { return !_tctrig->pvCorr() && _tctrig->pvCode() < 80 && _tctrig->pvCode() > 8; }
0128   /// Return if L outer
0129   inline int is0L() const { return !_tctrig->pvCorr() && _tctrig->pvCode() < 8; }
0130
0131   /// Return an uint16 with the content of the data word (for debugging)
0132   inline unsigned dataword() const { return _dataword.dataWord(0) & 0x1ff; }
0133
0134   /// Operator < used for sorting
0135   bool operator<(const DTTSCand &c) const { return _dataword < c._dataword; }
0136
0137   /// Operator <= used for sorting
0138   bool operator<=(const DTTSCand &c) const { return _dataword <= c._dataword; }
0139
0140   // Operator <<= used for sorting in TSM back-up mode
0141   // SM double TSM  bool operator <<= (const DTTSCand& c) const { return
0142   // _datawordbk<c._datawordbk; }
0143
0144   /// Print the trigger
0145   void print() const;
0146
0147 private:
0148   DTTSS *_tss;
0149   const DTTracoTrigData *_tctrig;
0150   BitArray<15> _dataword;  // the word on which sorting is done. reserve space
0151                            // enough for Preview and full data
0152   // SM double TSM  BitArray<9> _datawordbk; // the word on which sorting is
0153   // done (back-up mode)
0154   int _tcPos;  // TRACO position in TSS
0155   // SM double TSM   int _bkmod;            // TSM back-up mode flag
0156   int _isCarry;  // info for TSM
0157 };
0158
0159 #endif