File indexing completed on 2024-04-06 12:21:39
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0004 #include "L1Trigger/RPCTechnicalTrigger/interface/TTUBasicConfig.h"
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0015 TTUBasicConfig::TTUBasicConfig(const TTUBoardSpecs* ttuspecs) : TTUConfiguration(ttuspecs), m_debug{false} {}
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0017 TTUBasicConfig::TTUBasicConfig(const char* logic) : TTUConfiguration(logic), m_debug{false} {}
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0022 TTUBasicConfig::~TTUBasicConfig() {}
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0025 bool TTUBasicConfig::initialise(int line, int ttuid) {
0026 bool status(false);
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0030 std::vector<TTUBoardSpecs::TTUBoardConfig>::const_iterator itr;
0031 itr = m_ttuboardspecs->m_boardspecs.begin();
0032
0033 int pos(0);
0034 int maxboards = m_ttuboardspecs->m_boardspecs.size();
0035
0036 for (pos = 0; pos < maxboards; ++pos) {
0037 if (m_debug)
0038 std::cout << "TTUBasicConfig::initialise> " << m_ttuboardspecs->m_boardspecs[pos].m_Wheel1Id << std::endl;
0039 if (m_ttuboardspecs->m_boardspecs[pos].m_runId == ttuid)
0040 break;
0041 }
0042
0043
0044
0045 if (line == 2) {
0046 ttulogic()->setlogic("WedgeORLogic");
0047 } else {
0048 ttulogic()->setlogic((*itr).m_LogicType.c_str());
0049 }
0050
0051 status = ttulogic()->initialise();
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0055 ttulogic()->setBoardSpecs(m_ttuboardspecs->m_boardspecs[pos]);
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0059 m_vecmask.assign((*itr).m_MaskedSectors.begin(), (*itr).m_MaskedSectors.end());
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0061 m_vecforce.assign((*itr).m_ForcedSectors.begin(), (*itr).m_ForcedSectors.end());
0062
0063 if (!status) {
0064 if (m_debug)
0065 std::cout << "TTUConfiguration> Problem initialising the logic unit\n";
0066 return false;
0067 };
0068
0069 return status;
0070 }
0071
0072 void TTUBasicConfig::preprocess(TTUInput& input) {
0073 if (m_debug)
0074 std::cout << "TTUBasicConfig::preprocess> starts here" << std::endl;
0075
0076 input.mask(m_vecmask);
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0078
0079 if (m_debug)
0080 std::cout << "TTUBasicConfig::preprocess> done" << std::endl;
0081 }