Project CMSSW displayed by LXR |
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File indexing completed on 2024-04-06 12:22:18
0001 import FWCore.ParameterSet.Config as cms 0002 0003 # cfi for L1 GT VHDL Writer 0004 l1GtVhdlWriter = cms.EDAnalyzer("L1GtVhdlWriter", 0005 0006 # choose VHDL directory 0007 VhdlTemplatesDir = cms.string('../data/VhdlTemplates/'), 0008 0009 # choose ouput directory 0010 OutputDir = cms.string('../test/output/') 0011 ) 0012 0013
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