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File indexing completed on 2024-04-06 12:29:25
0001 import FWCore.ParameterSet.Config as cms 0002 0003 simEcalDigis = cms.EDProducer("EcalSelectiveReadoutProducer", 0004 # Label of input EB and EE digi collections 0005 digiProducer = cms.string('simEcalUnsuppressedDigis'), 0006 0007 # Instance name of input EB digi collections 0008 EBdigiCollection = cms.string(''), 0009 0010 # Instance name of input EB digi collections 0011 EEdigiCollection = cms.string(''), 0012 0013 # Instance name of output EB SR flags collection 0014 EBSrFlagCollection = cms.string('ebSrFlags'), 0015 0016 # Instance name of output EE SR flags collection 0017 EESrFlagCollection = cms.string('eeSrFlags'), 0018 0019 # Instance name of output EB digis collection 0020 EBSRPdigiCollection = cms.string('ebDigis'), 0021 0022 # Instance name of output EE digis collection 0023 EESRPdigiCollection = cms.string('eeDigis'), 0024 0025 # Switch for reading SRP settings from condition database 0026 configFromCondDB = cms.bool(True), 0027 0028 # Switch to turn off SRP altogether using special DB payload 0029 UseFullReadout = cms.bool(False), 0030 0031 # ES label? 0032 # NZSLabel = cms.ESInputTag(' '), 0033 0034 # Label name of input ECAL trigger primitive collection 0035 trigPrimProducer = cms.string('simEcalTriggerPrimitiveDigis'), 0036 0037 # Instance name of ECAL trigger primitive collection 0038 trigPrimCollection = cms.string(''), 0039 0040 #switch to run w/o trigger primitive. For debug use only 0041 0042 trigPrimBypass = cms.bool(False), 0043 0044 # Mode selection for "Trig bypass" mode 0045 # 0: TT thresholds applied on sum of crystal Et's 0046 # 1: TT thresholds applies on compressed Et from Trigger primitive 0047 # @ee trigPrimByPass_ switch 0048 trigPrimBypassMode = cms.int32(0), 0049 0050 #for debug mode only: 0051 trigPrimBypassLTH = cms.double(1.0), 0052 0053 #for debug mode only: 0054 trigPrimBypassHTH = cms.double(1.0), 0055 0056 #for debug mode only 0057 trigPrimBypassWithPeakFinder = cms.bool(True), 0058 0059 #number of events whose TT and SR flags must be dumped (for debug purpose): 0060 dumpFlags = cms.untracked.int32(0), 0061 0062 #logical flag to write out SrFlags 0063 writeSrFlags = cms.untracked.bool(True), 0064 0065 #switch to apply selective readout decision on the digis and produce 0066 #the "suppressed" digis 0067 produceDigis = cms.untracked.bool(True), 0068 0069 #Trigger Tower Flag to use when a flag is not found from the input 0070 #Trigger Primitive collection. Must be one of the following values: 0071 # 0: low interest, 1: mid interest, 3: high interest 0072 # 4: forced low interest, 5: forced mid interest, 7: forced high interest 0073 defaultTtf = cms.int32(4) 0074 ) 0075 0076 # Turn off SR in Ecal for premixing stage1 0077 from Configuration.ProcessModifiers.premix_stage1_cff import premix_stage1 0078 premix_stage1.toModify(simEcalDigis, UseFullReadout = True) 0079 0080 _simEcalDigisPh2 = simEcalDigis.clone( 0081 trigPrimBypass = True, 0082 )
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