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Warning, /Validation/RecoEgamma/test/dbs.FastZEEIdeal.oref is written in an unsupported language. File is not indexed.

0001 
0002 [oval run] =================================================
0003 [oval run] USER : chamont
0004 [oval run] HOST : lxplus402.cern.ch
0005 [oval run] OVAL_ENVNAME = FastZEEIdeal
0006 [oval run] TEST_RELEASE = 3_11_0_pre3
0007 [oval run] TEST_GLOBAL_TAG = MC_310_V3
0008 [oval run] TEST_GLOBAL_STARTUP_TAG = START310_V3
0009 [oval run] TEST_GLOBAL_VERSION = v1
0010 [oval run] TEST_OUTPUT_BASE = electronHistos.root
0011 [oval run] TEST_HISTOS_FILE = electronHistos.${OVAL_ENVNAME}.root
0012 [oval run] TEST_OUTPUT_LOGS = *.${OVAL_ENVNAME}.olog
0013 [oval run] DBS_RELEASE = CMSSW_${TEST_RELEASE}
0014 [oval run] DBS_TIER = -RECO
0015 [oval run] DBS_COND = ${TEST_GLOBAL_TAG}-${TEST_GLOBAL_VERSION}
0016 [oval run] VAL_NEW_RELEASE = 3_11_0_pre3
0017 [oval run] VAL_REF_RELEASE = 3_11_0_pre2
0018 [oval run] VAL_COMMENT = No electron code change.
0019 [oval run] STORE_RELEASE = ${VAL_NEW_RELEASE}
0020 [oval run] VAL_WEB = /afs/cern.ch/cms/Physics/egamma/www/validation
0021 [oval run] VAL_URL = http://cmsdoc.cern.ch/Physics/egamma/www/validation
0022 [oval run] STORE_WEB = ${VAL_WEB}
0023 [oval run] TEST_AFS_DIR = /afs/cern.ch/cms/CAF/CMSPHYS/PHYS_EGAMMA/electrons/chamont/Validation
0024 [oval run] DBS_COND = ${TEST_GLOBAL_TAG}*FastSim*-v2
0025 [oval run] VAL_ANALYZER = ElectronMcSignalValidator
0026 [oval run] VAL_CONFIGURATION = ElectronMcSignalValidation_cfg.py
0027 [oval run] VAL_HISTOS = ElectronMcSignalHistos.txt
0028 [oval run] DBS_SAMPLE = RelValZEE
0029 [oval run] electronDbsDiscovery.txt:
0030 [oval run]   /afs/cern.ch/cms/CAF/CMSPHYS/PHYS_EGAMMA/electrons/chamont/Validation/RelValSingleElectronPt10-MC-RECO.root
0031 [oval run]   /afs/cern.ch/cms/CAF/CMSPHYS/PHYS_EGAMMA/electrons/chamont/Validation/RelValSingleElectronPt35-MC-RECO.root
0032 [oval run]   /afs/cern.ch/cms/CAF/CMSPHYS/PHYS_EGAMMA/electrons/chamont/Validation/RelValTTbar-MC-RECO.root
0033 [oval run]   /afs/cern.ch/cms/CAF/CMSPHYS/PHYS_EGAMMA/electrons/chamont/Validation/RelValZEE-MC-RECO.root
0034 [oval run]   /afs/cern.ch/cms/CAF/CMSPHYS/PHYS_EGAMMA/electrons/chamont/Validation/RelValZEE-START-RECO.root
0035 [oval run]   /afs/cern.ch/cms/CAF/CMSPHYS/PHYS_EGAMMA/electrons/chamont/Validation/RelValQCD_Pt_80_120-MC-RECO.root
0036 [oval run] run tool: scram
0037 [oval run] error: /(?-xism:^dataset has 0 files:$)/
0038 [oval run] final instruction: ./electronDbsDiscovery.py
0039 [oval run] =================================================
0040 
0041 dataset has 50 files:
0042 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/F8EC880F-E91B-E011-8391-001A92810AD6.root
0043 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/F898131C-E71B-E011-869B-002618943896.root
0044 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/F6B55B8A-E81B-E011-BF90-003048678B0E.root
0045 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/F240948E-E81B-E011-93EF-0018F3D0965E.root
0046 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/F097CC8D-E81B-E011-AD55-00261894388A.root
0047 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/F092651E-E71B-E011-BDB6-0026189438C0.root
0048 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/F048F497-E71B-E011-A177-002354EF3BE1.root
0049 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/ECB5021C-E71B-E011-8354-0018F3D0969C.root
0050 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/EA907921-E71B-E011-9BDC-001BFCDBD15E.root
0051 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/EA68DE8F-E61B-E011-A6A1-002618943896.root
0052 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/E689060C-E91B-E011-A58D-002618943958.root
0053 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/E602F91A-E71B-E011-8055-002618943869.root
0054 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/E2D63220-E71B-E011-82A5-001A92971B04.root
0055 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/E0F9511C-E71B-E011-9B02-002618943974.root
0056 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/D0EA851B-E71B-E011-9C8E-003048678B86.root
0057 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/CA9A351C-E71B-E011-81E1-003048678B92.root
0058 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/C817F20A-E91B-E011-942D-002618B27F8A.root
0059 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/C48CC091-E61B-E011-A476-0018F3D095F2.root
0060 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/B2960F91-E61B-E011-B28E-001A92971B72.root
0061 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/ACAF300A-E91B-E011-803E-002618943864.root
0062 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/AA04C71D-E71B-E011-8ABE-002618943849.root
0063 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/A6C2D720-E71B-E011-91E1-0018F3D095FA.root
0064 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/A24A5222-E71B-E011-9861-001BFCDBD15E.root
0065 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/96A7C30D-E91B-E011-B679-0018F3D09636.root
0066 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/86E2D70A-E91B-E011-8F1C-00248C0BE018.root
0067 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/868C4690-E61B-E011-B40C-00261894395F.root
0068 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/8631621A-E71B-E011-8724-00304866C398.root
0069 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/76CA4090-E61B-E011-9F48-0026189438C0.root
0070 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/7420181E-E71B-E011-A719-0018F3D09680.root
0071 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/727F368F-E61B-E011-9A38-003048678B92.root
0072 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/72580D8A-E61B-E011-9210-003048678FE4.root
0073 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/6E6FEB1A-E71B-E011-8DC9-002618943843.root
0074 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/6AF8771D-E71B-E011-80D6-0018F3D09676.root
0075 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/68DE418E-E61B-E011-982D-002618943843.root
0076 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/6866580B-E91B-E011-8D0C-0026189438C2.root
0077 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/66A0E51A-E71B-E011-98C0-003048678FE4.root
0078 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/668ABA8E-E61B-E011-B917-002618943930.root
0079 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/5E5A461C-E71B-E011-8A3E-0026189438C2.root
0080 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/5E500599-E71B-E011-B0F5-002618943874.root
0081 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/50746D8F-E61B-E011-AF77-0026189438C2.root
0082 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/4ED80B20-E71B-E011-803B-001A92811748.root
0083 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/44707991-E81B-E011-8F75-002618943896.root
0084 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/38C90892-E81B-E011-AF47-0018F3D096E4.root
0085 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/30D1A41F-E71B-E011-AA99-001A928116C2.root
0086 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/2E450697-E71B-E011-84E5-003048679274.root
0087 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/26966698-E71B-E011-83F3-003048678B3C.root
0088 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/1EB8731C-E71B-E011-8741-00261894395F.root
0089 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/1044871C-E71B-E011-9EF9-0026189438C0.root
0090 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/0C80BD80-EC1B-E011-B107-0018F3D096E4.root
0091 /store/relval/CMSSW_3_11_0_pre3/RelValZEE/GEN-SIM-DIGI-RECO/MC_310_V3_FastSim-v2/0062/025BAE1E-E71B-E011-8EE1-0018F3D096A2.root
0092 
0093 [oval run] ==========================================
0094 [oval run] result: OK
0095 [oval run] ==========================================
0096 
0097 [oval diff] ================================================
0098 [oval diff] OVAL_ENVNAME = FastZEEIdeal
0099 [oval diff] TEST_RELEASE = 3_11_0_pre3
0100 [oval diff] TEST_GLOBAL_TAG = MC_310_V3
0101 [oval diff] TEST_GLOBAL_STARTUP_TAG = START310_V3
0102 [oval diff] TEST_GLOBAL_VERSION = v1
0103 [oval diff] TEST_OUTPUT_BASE = electronHistos.root
0104 [oval diff] TEST_HISTOS_FILE = electronHistos.${OVAL_ENVNAME}.root
0105 [oval diff] TEST_OUTPUT_LOGS = *.${OVAL_ENVNAME}.olog
0106 [oval diff] DBS_RELEASE = CMSSW_${TEST_RELEASE}
0107 [oval diff] DBS_TIER = -RECO
0108 [oval diff] DBS_COND = ${TEST_GLOBAL_TAG}-${TEST_GLOBAL_VERSION}
0109 [oval diff] VAL_NEW_RELEASE = 3_11_0_pre3
0110 [oval diff] VAL_REF_RELEASE = 3_11_0_pre2
0111 [oval diff] VAL_COMMENT = No electron code change.
0112 [oval diff] STORE_RELEASE = ${VAL_NEW_RELEASE}
0113 [oval diff] VAL_WEB = /afs/cern.ch/cms/Physics/egamma/www/validation
0114 [oval diff] VAL_URL = http://cmsdoc.cern.ch/Physics/egamma/www/validation
0115 [oval diff] STORE_WEB = ${VAL_WEB}
0116 [oval diff] TEST_AFS_DIR = /afs/cern.ch/cms/CAF/CMSPHYS/PHYS_EGAMMA/electrons/chamont/Validation
0117 [oval diff] DBS_COND = ${TEST_GLOBAL_TAG}*FastSim*-v2
0118 [oval diff] VAL_ANALYZER = ElectronMcSignalValidator
0119 [oval diff] VAL_CONFIGURATION = ElectronMcSignalValidation_cfg.py
0120 [oval diff] VAL_HISTOS = ElectronMcSignalHistos.txt
0121 [oval diff] DBS_SAMPLE = RelValZEE
0122 [oval diff] electronDbsDiscovery.txt:
0123 [oval diff]   /afs/cern.ch/cms/CAF/CMSPHYS/PHYS_EGAMMA/electrons/chamont/Validation/RelValSingleElectronPt10-MC-RECO.root
0124 [oval diff]   /afs/cern.ch/cms/CAF/CMSPHYS/PHYS_EGAMMA/electrons/chamont/Validation/RelValSingleElectronPt35-MC-RECO.root
0125 [oval diff]   /afs/cern.ch/cms/CAF/CMSPHYS/PHYS_EGAMMA/electrons/chamont/Validation/RelValTTbar-MC-RECO.root
0126 [oval diff]   /afs/cern.ch/cms/CAF/CMSPHYS/PHYS_EGAMMA/electrons/chamont/Validation/RelValZEE-MC-RECO.root
0127 [oval diff]   /afs/cern.ch/cms/CAF/CMSPHYS/PHYS_EGAMMA/electrons/chamont/Validation/RelValZEE-START-RECO.root
0128 [oval diff]   /afs/cern.ch/cms/CAF/CMSPHYS/PHYS_EGAMMA/electrons/chamont/Validation/RelValQCD_Pt_80_120-MC-RECO.root
0129 [oval diff] diff line: /(?-xism:^(TH1.Print Name  = [a-zA-Z_]+, Entries= ).*$)/
0130 [oval diff] diff line: /(?-xism:^(h_\S+ has )\d+ entries of mean value \S+$)/
0131 [oval diff] diff number: /(?-xism:^dataset has (\d+) files:$)/ ~ 1
0132 [oval diff] diff number: /(?-xism:^TH1.Print Name  = [a-zA-Z_]+, Entries= (\d+),.*$)/ ~ 20%
0133 [oval diff] diff number: /(?-xism:^TH1.Print Name  = [a-zA-Z_]+, Entries= \d+, Total sum= (\S+)$)/ ~ 10%
0134 [oval diff] diff number: /(?-xism:^h_\S+ has (\d+) entries of mean value \S+$)/ ~ 20%
0135 [oval diff] diff number: /(?-xism:^h_\S+ has \d+ entries of mean value (\S+)$)/ ~ 10%
0136 [oval diff] ================================================
0137 
0138 === olog #41 !~ oref #37 (>1)
0139 olog: dataset has 50 files:
0140 ---
0141 oref: dataset has 0 files:
0142 
0143 [oval diff] =========================================
0144 [oval diff] result: DIFFS
0145 [oval diff] =========================================
0146