SiStripCommissioningAnalysis/src/FedCablingAlgorithm.cc

0001 #include "DQM/SiStripCommissioningAnalysis/interface/FedCablingAlgorithm.h"
0002 #include "CondFormats/SiStripObjects/interface/FedCablingAnalysis.h"
0003 #include "DataFormats/SiStripCommon/interface/SiStripHistoTitle.h"
0004 #include "DataFormats/SiStripCommon/interface/SiStripEnumsAndStrings.h"
0005 #include "FWCore/MessageLogger/interface/MessageLogger.h"
0006 #include "TProfile.h"
0007 #include "TH1.h"
0008 #include <iostream>
0009 #include <sstream>
0010 #include <iomanip>
0011 #include <cmath>
0012
0013 using namespace sistrip;
0014
0015 // ----------------------------------------------------------------------------
0016 //
0017 FedCablingAlgorithm::FedCablingAlgorithm(const edm::ParameterSet& pset, FedCablingAnalysis* const anal)
0018     : CommissioningAlgorithm(anal), hFedId_(nullptr, ""), hFedCh_(nullptr, "") {
0019   ;
0020 }
0021
0022 // ----------------------------------------------------------------------------
0023 //
0024 void FedCablingAlgorithm::extract(const std::vector<TH1*>& histos) {
0025   if (!anal()) {
0026     edm::LogWarning(mlCommissioning_) << "[FedCablingAlgorithm::" << __func__ << "]"
0027                                       << " NULL pointer to Analysis object!";
0028     return;
0029   }
0030
0031   // Check number of histograms
0032   if (histos.size() != 2) {
0033     anal()->addErrorCode(sistrip::numberOfHistos_);
0034   }
0035
0036   // Extract FED key from histo title
0037   if (!histos.empty()) {
0038     anal()->fedKey(extractFedKey(histos.front()));
0039   }
0040
0041   // Extract histograms
0042   std::vector<TH1*>::const_iterator ihis = histos.begin();
0043   for (; ihis != histos.end(); ihis++) {
0044     // Check for NULL pointer
0045     if (!(*ihis)) {
0046       continue;
0047     }
0048
0049     // Check name
0050     SiStripHistoTitle title((*ihis)->GetName());
0051     if (title.runType() != sistrip::FED_CABLING) {
0052       anal()->addErrorCode(sistrip::unexpectedTask_);
0053       continue;
0054     }
0055
0056     // Extract FED id and channel histos
0057     if (title.extraInfo().find(sistrip::feDriver_) != std::string::npos) {
0058       hFedId_.first = *ihis;
0059       hFedId_.second = (*ihis)->GetName();
0060     } else if (title.extraInfo().find(sistrip::fedChannel_) != std::string::npos) {
0061       hFedCh_.first = *ihis;
0062       hFedCh_.second = (*ihis)->GetName();
0063     } else {
0064       anal()->addErrorCode(sistrip::unexpectedExtraInfo_);
0065     }
0066   }
0067 }
0068
0069 // -----------------------------------------------------------------------------
0070 //
0071 void FedCablingAlgorithm::analyse() {
0072   if (!anal()) {
0073     edm::LogWarning(mlCommissioning_) << "[FedCablingAlgorithm::" << __func__ << "]"
0074                                       << " NULL pointer to base Analysis object!";
0075     return;
0076   }
0077
0078   CommissioningAnalysis* tmp = const_cast<CommissioningAnalysis*>(anal());
0079   FedCablingAnalysis* anal = dynamic_cast<FedCablingAnalysis*>(tmp);
0080   if (!anal) {
0081     edm::LogWarning(mlCommissioning_) << "[FedCablingAlgorithm::" << __func__ << "]"
0082                                       << " NULL pointer to derived Analysis object!";
0083     return;
0084   }
0085
0086   if (!hFedId_.first) {
0087     anal->addErrorCode(sistrip::nullPtr_);
0088     return;
0089   }
0090
0091   if (!hFedCh_.first) {
0092     anal->addErrorCode(sistrip::nullPtr_);
0093     return;
0094   }
0095
0096   TProfile* fedid_histo = dynamic_cast<TProfile*>(hFedId_.first);
0097   if (!fedid_histo) {
0098     anal->addErrorCode(sistrip::nullPtr_);
0099     return;
0100   }
0101
0102   TProfile* fedch_histo = dynamic_cast<TProfile*>(hFedCh_.first);
0103   if (!fedch_histo) {
0104     anal->addErrorCode(sistrip::nullPtr_);
0105     return;
0106   }
0107
0108   // Some initialization
0109   anal->candidates_.clear();
0110   float max = -1.;
0111   float weight = -1.;
0112   uint16_t id_val = sistrip::invalid_;
0113   uint16_t ch_val = sistrip::invalid_;
0114
0115   // FED id
0116   max = 0.;
0117   for (uint16_t ifed = 0; ifed < fedid_histo->GetNbinsX(); ifed++) {
0118     if (fedid_histo->GetBinEntries(ifed + 1)) {
0119       if (fedid_histo->GetBinContent(ifed + 1) > max &&
0120           fedid_histo->GetBinContent(ifed + 1) > FedCablingAnalysis::threshold_) {
0121         id_val = ifed;
0122         max = fedid_histo->GetBinContent(ifed + 1);
0123       }
0124     }
0125   }
0126   weight = max;
0127
0128   // FED ch
0129   max = 0.;
0130   for (uint16_t ichan = 0; ichan < fedch_histo->GetNbinsX(); ichan++) {
0131     if (fedch_histo->GetBinEntries(ichan + 1)) {
0132       if (fedch_histo->GetBinContent(ichan + 1) > max &&
0133           fedch_histo->GetBinContent(ichan + 1) > FedCablingAnalysis::threshold_) {
0134         ch_val = ichan;
0135         max = fedch_histo->GetBinContent(ichan + 1);
0136       }
0137     }
0138   }
0139   if (max > weight) {
0140     weight = max;
0141   }
0142
0143   // Set "best" candidate and ADC level
0144   if (id_val != sistrip::invalid_ && ch_val != sistrip::invalid_) {
0145     uint32_t key = SiStripFedKey(id_val, SiStripFedKey::feUnit(ch_val), SiStripFedKey::feChan(ch_val)).key();
0146     anal->candidates_[key] = static_cast<uint16_t>(weight);
0147     anal->fedId_ = id_val;
0148     anal->fedCh_ = ch_val;
0149     anal->adcLevel_ = weight;
0150   } else {
0151     anal->addErrorCode(sistrip::noCandidates_);
0152   }
0153 }