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File indexing completed on 2023-10-25 10:00:35

0001 #ifndef RecoLocalTracker_SiPixelClusterizer_plugins_SiPixelRawToClusterGPUKernel_h
0002 #define RecoLocalTracker_SiPixelClusterizer_plugins_SiPixelRawToClusterGPUKernel_h
0003 
0004 #include <algorithm>
0005 #include <cuda_runtime.h>
0006 
0007 #include "DataFormats/SiPixelDetId/interface/PixelChannelIdentifier.h"
0008 #include "DataFormats/SiPixelRawData/interface/SiPixelErrorCompact.h"
0009 #include "DataFormats/SiPixelRawData/interface/SiPixelFormatterErrors.h"
0010 #include "CUDADataFormats/SiPixelDigi/interface/SiPixelDigisCUDA.h"
0011 #include "CUDADataFormats/SiPixelDigi/interface/SiPixelDigiErrorsCUDA.h"
0012 #include "CUDADataFormats/SiPixelCluster/interface/SiPixelClustersCUDA.h"
0013 #include "FWCore/Utilities/interface/typedefs.h"
0014 #include "HeterogeneousCore/CUDAUtilities/interface/SimpleVector.h"
0015 #include "HeterogeneousCore/CUDAUtilities/interface/host_unique_ptr.h"
0016 #include "HeterogeneousCore/CUDAUtilities/interface/host_noncached_unique_ptr.h"
0017 #include "Geometry/CommonTopologies/interface/SimplePixelTopology.h"
0018 
0019 // #define GPU_DEBUG
0020 
0021 // local include(s)
0022 #include "SiPixelClusterThresholds.h"
0023 
0024 struct SiPixelROCsStatusAndMapping;
0025 class SiPixelGainForHLTonGPU;
0026 
0027 namespace pixelgpudetails {
0028 
0029   inline namespace phase1geometry {
0030     const uint32_t layerStartBit = 20;
0031     const uint32_t ladderStartBit = 12;
0032     const uint32_t moduleStartBit = 2;
0033 
0034     const uint32_t panelStartBit = 10;
0035     const uint32_t diskStartBit = 18;
0036     const uint32_t bladeStartBit = 12;
0037 
0038     const uint32_t layerMask = 0xF;
0039     const uint32_t ladderMask = 0xFF;
0040     const uint32_t moduleMask = 0x3FF;
0041     const uint32_t panelMask = 0x3;
0042     const uint32_t diskMask = 0xF;
0043     const uint32_t bladeMask = 0x3F;
0044   }  // namespace phase1geometry
0045 
0046   const uint32_t maxROCIndex = 8;
0047   const uint32_t numRowsInRoc = 80;
0048   const uint32_t numColsInRoc = 52;
0049 
0050   const uint32_t MAX_WORD = 2000;
0051 
0052   struct DetIdGPU {
0053     uint32_t rawId;
0054     uint32_t rocInDet;
0055     uint32_t moduleId;
0056   };
0057 
0058   struct Pixel {
0059     uint32_t row;
0060     uint32_t col;
0061   };
0062 
0063   inline constexpr pixelchannelidentifierimpl::Packing packing() { return PixelChannelIdentifier::thePacking; }
0064 
0065   inline constexpr uint32_t pack(uint32_t row, uint32_t col, uint32_t adc, uint32_t flag = 0) {
0066     constexpr pixelchannelidentifierimpl::Packing thePacking = packing();
0067     adc = std::min(adc, uint32_t(thePacking.max_adc));
0068 
0069     return (row << thePacking.row_shift) | (col << thePacking.column_shift) | (adc << thePacking.adc_shift);
0070   }
0071 
0072   constexpr uint32_t pixelToChannel(int row, int col) {
0073     constexpr pixelchannelidentifierimpl::Packing thePacking = packing();
0074     return (row << thePacking.column_width) | col;
0075   }
0076 
0077   template <typename TrackerTraits>
0078   class SiPixelRawToClusterGPUKernel {
0079   public:
0080     class WordFedAppender {
0081     public:
0082       WordFedAppender(uint32_t words, cudaStream_t stream)
0083           : word_{cms::cuda::make_host_unique<unsigned int[]>(words, stream)},
0084             fedId_{cms::cuda::make_host_unique<unsigned char[]>(words, stream)} {}
0085 
0086       void initializeWordFed(int fedId, unsigned int index, cms_uint32_t const* src, unsigned int length) {
0087         std::memcpy(word_.get() + index, src, sizeof(cms_uint32_t) * length);
0088         std::memset(fedId_.get() + index / 2, fedId - FEDNumbering::MINSiPixeluTCAFEDID, length / 2);
0089       }
0090 
0091       const unsigned int* word() const { return word_.get(); }
0092       const unsigned char* fedId() const { return fedId_.get(); }
0093 
0094     private:
0095       cms::cuda::host::unique_ptr<unsigned int[]> word_;
0096       cms::cuda::host::unique_ptr<unsigned char[]> fedId_;
0097     };
0098 
0099     SiPixelRawToClusterGPUKernel() = default;
0100     ~SiPixelRawToClusterGPUKernel() = default;
0101 
0102     SiPixelRawToClusterGPUKernel(const SiPixelRawToClusterGPUKernel&) = delete;
0103     SiPixelRawToClusterGPUKernel(SiPixelRawToClusterGPUKernel&&) = delete;
0104     SiPixelRawToClusterGPUKernel& operator=(const SiPixelRawToClusterGPUKernel&) = delete;
0105     SiPixelRawToClusterGPUKernel& operator=(SiPixelRawToClusterGPUKernel&&) = delete;
0106 
0107     void makePhase1ClustersAsync(const SiPixelClusterThresholds clusterThresholds,
0108                                  const SiPixelROCsStatusAndMapping* cablingMap,
0109                                  const unsigned char* modToUnp,
0110                                  const SiPixelGainForHLTonGPU* gains,
0111                                  const WordFedAppender& wordFed,
0112                                  SiPixelFormatterErrors&& errors,
0113                                  const uint32_t wordCounter,
0114                                  const uint32_t fedCounter,
0115                                  bool useQualityInfo,
0116                                  bool includeErrors,
0117                                  bool debug,
0118                                  cudaStream_t stream);
0119 
0120     void makePhase2ClustersAsync(const SiPixelClusterThresholds clusterThresholds,
0121                                  const uint16_t* moduleIds,
0122                                  const uint16_t* xDigis,
0123                                  const uint16_t* yDigis,
0124                                  const uint16_t* adcDigis,
0125                                  const uint32_t* packedData,
0126                                  const uint32_t* rawIds,
0127                                  const uint32_t numDigis,
0128                                  cudaStream_t stream);
0129 
0130     std::pair<SiPixelDigisCUDA, SiPixelClustersCUDA> getResults() {
0131       digis_d.setNModulesDigis(nModules_Clusters_h[0], nDigis);
0132       assert(nModules_Clusters_h[2] <= nModules_Clusters_h[1]);
0133       clusters_d.setNClusters(nModules_Clusters_h[1], nModules_Clusters_h[2]);
0134       // need to explicitly deallocate while the associated CUDA
0135       // stream is still alive
0136       //
0137       // technically the statement above is not true anymore now that
0138       // the CUDA streams are cached within the cms::cuda::StreamCache, but it is
0139       // still better to release as early as possible
0140       nModules_Clusters_h.reset();
0141       return std::make_pair(std::move(digis_d), std::move(clusters_d));
0142     }
0143 
0144     SiPixelDigiErrorsCUDA&& getErrors() { return std::move(digiErrors_d); }
0145 
0146   private:
0147     uint32_t nDigis;
0148 
0149     // Data to be put in the event
0150     cms::cuda::host::unique_ptr<uint32_t[]> nModules_Clusters_h;
0151     SiPixelDigisCUDA digis_d;
0152     SiPixelClustersCUDA clusters_d;
0153     SiPixelDigiErrorsCUDA digiErrors_d;
0154   };
0155 
0156 }  // namespace pixelgpudetails
0157 
0158 #endif  // RecoLocalTracker_SiPixelClusterizer_plugins_SiPixelRawToClusterGPUKernel_h