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File indexing completed on 2024-04-06 12:26:20

0001 #ifndef RecoLocalTracker_SiPixelClusterizer_plugins_SiPixelRawToClusterGPUKernel_h
0002 #define RecoLocalTracker_SiPixelClusterizer_plugins_SiPixelRawToClusterGPUKernel_h
0003 
0004 #include <algorithm>
0005 
0006 #include <cuda_runtime.h>
0007 
0008 #include "CUDADataFormats/SiPixelCluster/interface/SiPixelClustersCUDA.h"
0009 #include "CUDADataFormats/SiPixelDigi/interface/SiPixelDigiErrorsCUDA.h"
0010 #include "CUDADataFormats/SiPixelDigi/interface/SiPixelDigisCUDA.h"
0011 #include "DataFormats/SiPixelDetId/interface/PixelChannelIdentifier.h"
0012 #include "DataFormats/SiPixelRawData/interface/SiPixelErrorCompact.h"
0013 #include "DataFormats/SiPixelRawData/interface/SiPixelFormatterErrors.h"
0014 #include "FWCore/Utilities/interface/typedefs.h"
0015 #include "Geometry/CommonTopologies/interface/SimplePixelTopology.h"
0016 #include "HeterogeneousCore/CUDAUtilities/interface/SimpleVector.h"
0017 #include "HeterogeneousCore/CUDAUtilities/interface/host_noncached_unique_ptr.h"
0018 #include "HeterogeneousCore/CUDAUtilities/interface/host_unique_ptr.h"
0019 #include "RecoLocalTracker/SiPixelClusterizer/interface/SiPixelClusterThresholds.h"
0020 
0021 //#define GPU_DEBUG
0022 
0023 struct SiPixelROCsStatusAndMapping;
0024 class SiPixelGainForHLTonGPU;
0025 
0026 namespace pixelgpudetails {
0027 
0028   inline namespace phase1geometry {
0029     const uint32_t layerStartBit = 20;
0030     const uint32_t ladderStartBit = 12;
0031     const uint32_t moduleStartBit = 2;
0032 
0033     const uint32_t panelStartBit = 10;
0034     const uint32_t diskStartBit = 18;
0035     const uint32_t bladeStartBit = 12;
0036 
0037     const uint32_t layerMask = 0xF;
0038     const uint32_t ladderMask = 0xFF;
0039     const uint32_t moduleMask = 0x3FF;
0040     const uint32_t panelMask = 0x3;
0041     const uint32_t diskMask = 0xF;
0042     const uint32_t bladeMask = 0x3F;
0043   }  // namespace phase1geometry
0044 
0045   const uint32_t maxROCIndex = 8;
0046   const uint32_t numRowsInRoc = 80;
0047   const uint32_t numColsInRoc = 52;
0048 
0049   const uint32_t MAX_WORD = 2000;
0050 
0051   struct DetIdGPU {
0052     uint32_t rawId;
0053     uint32_t rocInDet;
0054     uint32_t moduleId;
0055   };
0056 
0057   struct Pixel {
0058     uint32_t row;
0059     uint32_t col;
0060   };
0061 
0062   inline constexpr pixelchannelidentifierimpl::Packing packing() { return PixelChannelIdentifier::thePacking; }
0063 
0064   inline constexpr uint32_t pack(uint32_t row, uint32_t col, uint32_t adc, uint32_t flag = 0) {
0065     constexpr pixelchannelidentifierimpl::Packing thePacking = packing();
0066     adc = std::min(adc, uint32_t(thePacking.max_adc));
0067 
0068     return (row << thePacking.row_shift) | (col << thePacking.column_shift) | (adc << thePacking.adc_shift);
0069   }
0070 
0071   constexpr uint32_t pixelToChannel(int row, int col) {
0072     constexpr pixelchannelidentifierimpl::Packing thePacking = packing();
0073     return (row << thePacking.column_width) | col;
0074   }
0075 
0076   template <typename TrackerTraits>
0077   class SiPixelRawToClusterGPUKernel {
0078   public:
0079     class WordFedAppender {
0080     public:
0081       WordFedAppender(uint32_t words, cudaStream_t stream)
0082           : word_{cms::cuda::make_host_unique<unsigned int[]>(words, stream)},
0083             fedId_{cms::cuda::make_host_unique<unsigned char[]>(words, stream)} {}
0084 
0085       void initializeWordFed(int fedId, unsigned int index, cms_uint32_t const* src, unsigned int length) {
0086         std::memcpy(word_.get() + index, src, sizeof(cms_uint32_t) * length);
0087         std::memset(fedId_.get() + index / 2, fedId - FEDNumbering::MINSiPixeluTCAFEDID, length / 2);
0088       }
0089 
0090       const unsigned int* word() const { return word_.get(); }
0091       const unsigned char* fedId() const { return fedId_.get(); }
0092 
0093     private:
0094       cms::cuda::host::unique_ptr<unsigned int[]> word_;
0095       cms::cuda::host::unique_ptr<unsigned char[]> fedId_;
0096     };
0097 
0098     SiPixelRawToClusterGPUKernel() = default;
0099     ~SiPixelRawToClusterGPUKernel() = default;
0100 
0101     SiPixelRawToClusterGPUKernel(const SiPixelRawToClusterGPUKernel&) = delete;
0102     SiPixelRawToClusterGPUKernel(SiPixelRawToClusterGPUKernel&&) = delete;
0103     SiPixelRawToClusterGPUKernel& operator=(const SiPixelRawToClusterGPUKernel&) = delete;
0104     SiPixelRawToClusterGPUKernel& operator=(SiPixelRawToClusterGPUKernel&&) = delete;
0105 
0106     void makePhase1ClustersAsync(const SiPixelClusterThresholds clusterThresholds,
0107                                  const SiPixelROCsStatusAndMapping* cablingMap,
0108                                  const unsigned char* modToUnp,
0109                                  const SiPixelGainForHLTonGPU* gains,
0110                                  const WordFedAppender& wordFed,
0111                                  SiPixelFormatterErrors&& errors,
0112                                  const uint32_t wordCounter,
0113                                  const uint32_t fedCounter,
0114                                  bool useQualityInfo,
0115                                  bool includeErrors,
0116                                  bool debug,
0117                                  cudaStream_t stream);
0118 
0119     void makePhase2ClustersAsync(const SiPixelClusterThresholds clusterThresholds,
0120                                  const uint16_t* moduleIds,
0121                                  const uint16_t* xDigis,
0122                                  const uint16_t* yDigis,
0123                                  const uint16_t* adcDigis,
0124                                  const uint32_t* packedData,
0125                                  const uint32_t* rawIds,
0126                                  const uint32_t numDigis,
0127                                  cudaStream_t stream);
0128 
0129     std::pair<SiPixelDigisCUDA, SiPixelClustersCUDA> getResults() {
0130       digis_d.setNModulesDigis(nModules_Clusters_h[0], nDigis);
0131       assert(nModules_Clusters_h[2] <= nModules_Clusters_h[1]);
0132       clusters_d.setNClusters(nModules_Clusters_h[1], nModules_Clusters_h[2]);
0133 
0134 #ifdef GPU_DEBUG
0135       std::cout << "SiPixelClusterizerCUDA results:" << std::endl
0136                 << " > no. of digis: " << nDigis << std::endl
0137                 << " > no. of active modules: " << nModules_Clusters_h[0] << std::endl
0138                 << " > no. of clusters: " << nModules_Clusters_h[1] << std::endl
0139                 << " > bpix2 offset: " << nModules_Clusters_h[2] << std::endl;
0140 #endif
0141       // need to explicitly deallocate while the associated CUDA
0142       // stream is still alive
0143       //
0144       // technically the statement above is not true anymore now that
0145       // the CUDA streams are cached within the cms::cuda::StreamCache, but it is
0146       // still better to release as early as possible
0147       nModules_Clusters_h.reset();
0148       return std::make_pair(std::move(digis_d), std::move(clusters_d));
0149     }
0150 
0151     SiPixelDigiErrorsCUDA&& getErrors() { return std::move(digiErrors_d); }
0152 
0153   private:
0154     uint32_t nDigis;
0155 
0156     // Data to be put in the event
0157     cms::cuda::host::unique_ptr<uint32_t[]> nModules_Clusters_h;
0158     SiPixelDigisCUDA digis_d;
0159     SiPixelClustersCUDA clusters_d;
0160     SiPixelDigiErrorsCUDA digiErrors_d;
0161   };
0162 
0163 }  // namespace pixelgpudetails
0164 
0165 #endif  // RecoLocalTracker_SiPixelClusterizer_plugins_SiPixelRawToClusterGPUKernel_h