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File indexing completed on 2022-08-02 22:42:23

0001 #ifndef RecoLocalTracker_SiPixelClusterizer_plugins_SiPixelRawToClusterGPUKernel_h
0002 #define RecoLocalTracker_SiPixelClusterizer_plugins_SiPixelRawToClusterGPUKernel_h
0003 
0004 #include <algorithm>
0005 #include <cuda_runtime.h>
0006 
0007 #include "DataFormats/SiPixelDetId/interface/PixelChannelIdentifier.h"
0008 #include "CUDADataFormats/SiPixelDigi/interface/SiPixelDigisCUDA.h"
0009 #include "CUDADataFormats/SiPixelDigi/interface/SiPixelDigiErrorsCUDA.h"
0010 #include "CUDADataFormats/SiPixelCluster/interface/SiPixelClustersCUDA.h"
0011 #include "FWCore/Utilities/interface/typedefs.h"
0012 #include "HeterogeneousCore/CUDAUtilities/interface/SimpleVector.h"
0013 #include "HeterogeneousCore/CUDAUtilities/interface/host_unique_ptr.h"
0014 #include "HeterogeneousCore/CUDAUtilities/interface/host_noncached_unique_ptr.h"
0015 #include "DataFormats/SiPixelRawData/interface/SiPixelErrorCompact.h"
0016 #include "DataFormats/SiPixelRawData/interface/SiPixelFormatterErrors.h"
0017 
0018 // local include(s)
0019 #include "SiPixelClusterThresholds.h"
0020 
0021 struct SiPixelROCsStatusAndMapping;
0022 class SiPixelGainForHLTonGPU;
0023 
0024 namespace pixelgpudetails {
0025 
0026   inline namespace phase1geometry {
0027     const uint32_t layerStartBit = 20;
0028     const uint32_t ladderStartBit = 12;
0029     const uint32_t moduleStartBit = 2;
0030 
0031     const uint32_t panelStartBit = 10;
0032     const uint32_t diskStartBit = 18;
0033     const uint32_t bladeStartBit = 12;
0034 
0035     const uint32_t layerMask = 0xF;
0036     const uint32_t ladderMask = 0xFF;
0037     const uint32_t moduleMask = 0x3FF;
0038     const uint32_t panelMask = 0x3;
0039     const uint32_t diskMask = 0xF;
0040     const uint32_t bladeMask = 0x3F;
0041   }  // namespace phase1geometry
0042 
0043   const uint32_t maxROCIndex = 8;
0044   const uint32_t numRowsInRoc = 80;
0045   const uint32_t numColsInRoc = 52;
0046 
0047   const uint32_t MAX_WORD = 2000;
0048 
0049   struct DetIdGPU {
0050     uint32_t rawId;
0051     uint32_t rocInDet;
0052     uint32_t moduleId;
0053   };
0054 
0055   struct Pixel {
0056     uint32_t row;
0057     uint32_t col;
0058   };
0059 
0060   inline constexpr pixelchannelidentifierimpl::Packing packing() { return PixelChannelIdentifier::thePacking; }
0061 
0062   inline constexpr uint32_t pack(uint32_t row, uint32_t col, uint32_t adc, uint32_t flag = 0) {
0063     constexpr pixelchannelidentifierimpl::Packing thePacking = packing();
0064     adc = std::min(adc, uint32_t(thePacking.max_adc));
0065 
0066     return (row << thePacking.row_shift) | (col << thePacking.column_shift) | (adc << thePacking.adc_shift);
0067   }
0068 
0069   constexpr uint32_t pixelToChannel(int row, int col) {
0070     constexpr pixelchannelidentifierimpl::Packing thePacking = packing();
0071     return (row << thePacking.column_width) | col;
0072   }
0073 
0074   class SiPixelRawToClusterGPUKernel {
0075   public:
0076     class WordFedAppender {
0077     public:
0078       WordFedAppender(uint32_t words, cudaStream_t stream)
0079           : word_{cms::cuda::make_host_unique<unsigned int[]>(words, stream)},
0080             fedId_{cms::cuda::make_host_unique<unsigned char[]>(words, stream)} {}
0081 
0082       void initializeWordFed(int fedId, unsigned int index, cms_uint32_t const* src, unsigned int length) {
0083         std::memcpy(word_.get() + index, src, sizeof(cms_uint32_t) * length);
0084         std::memset(fedId_.get() + index / 2, fedId - FEDNumbering::MINSiPixeluTCAFEDID, length / 2);
0085       }
0086 
0087       const unsigned int* word() const { return word_.get(); }
0088       const unsigned char* fedId() const { return fedId_.get(); }
0089 
0090     private:
0091       cms::cuda::host::unique_ptr<unsigned int[]> word_;
0092       cms::cuda::host::unique_ptr<unsigned char[]> fedId_;
0093     };
0094 
0095     SiPixelRawToClusterGPUKernel() = default;
0096     ~SiPixelRawToClusterGPUKernel() = default;
0097 
0098     SiPixelRawToClusterGPUKernel(const SiPixelRawToClusterGPUKernel&) = delete;
0099     SiPixelRawToClusterGPUKernel(SiPixelRawToClusterGPUKernel&&) = delete;
0100     SiPixelRawToClusterGPUKernel& operator=(const SiPixelRawToClusterGPUKernel&) = delete;
0101     SiPixelRawToClusterGPUKernel& operator=(SiPixelRawToClusterGPUKernel&&) = delete;
0102 
0103     void makeClustersAsync(bool isRun2,
0104                            const SiPixelClusterThresholds clusterThresholds,
0105                            const SiPixelROCsStatusAndMapping* cablingMap,
0106                            const unsigned char* modToUnp,
0107                            const SiPixelGainForHLTonGPU* gains,
0108                            const WordFedAppender& wordFed,
0109                            SiPixelFormatterErrors&& errors,
0110                            const uint32_t wordCounter,
0111                            const uint32_t fedCounter,
0112                            bool useQualityInfo,
0113                            bool includeErrors,
0114                            bool debug,
0115                            cudaStream_t stream);
0116 
0117     void makePhase2ClustersAsync(const SiPixelClusterThresholds clusterThresholds,
0118                                  const uint16_t* moduleIds,
0119                                  const uint16_t* xDigis,
0120                                  const uint16_t* yDigis,
0121                                  const uint16_t* adcDigis,
0122                                  const uint32_t* packedData,
0123                                  const uint32_t* rawIds,
0124                                  const uint32_t numDigis,
0125                                  cudaStream_t stream);
0126 
0127     std::pair<SiPixelDigisCUDA, SiPixelClustersCUDA> getResults() {
0128       digis_d.setNModulesDigis(nModules_Clusters_h[0], nDigis);
0129       assert(nModules_Clusters_h[2] <= nModules_Clusters_h[1]);
0130       clusters_d.setNClusters(nModules_Clusters_h[1], nModules_Clusters_h[2]);
0131       // need to explicitly deallocate while the associated CUDA
0132       // stream is still alive
0133       //
0134       // technically the statement above is not true anymore now that
0135       // the CUDA streams are cached within the cms::cuda::StreamCache, but it is
0136       // still better to release as early as possible
0137       nModules_Clusters_h.reset();
0138       return std::make_pair(std::move(digis_d), std::move(clusters_d));
0139     }
0140 
0141     SiPixelDigiErrorsCUDA&& getErrors() { return std::move(digiErrors_d); }
0142 
0143   private:
0144     uint32_t nDigis;
0145 
0146     // Data to be put in the event
0147     cms::cuda::host::unique_ptr<uint32_t[]> nModules_Clusters_h;
0148     SiPixelDigisCUDA digis_d;
0149     SiPixelClustersCUDA clusters_d;
0150     SiPixelDigiErrorsCUDA digiErrors_d;
0151   };
0152 
0153 }  // namespace pixelgpudetails
0154 
0155 #endif  // RecoLocalTracker_SiPixelClusterizer_plugins_SiPixelRawToClusterGPUKernel_h