CMSSW_10_1_6

Changes since CMSSW_10_1_5:

compare to previous

  1. 23369 from @MilanoBicocca-pix: [Backport] Update max number of LS in beamspot IOVs alca created: 2018-05-29 14:34:58 merged: 2018-05-30 09:32:41

  2. 23362 from @MilanoBicocca-pix: [Backport] Update errorScale parameter for HP beamspot alca created: 2018-05-28 20:14:07 merged: 2018-05-30 09:34:45

  3. 23344 from @bsunanda: Run2-alca134 Backport PR #23343 to reduce o/p rate alca created: 2018-05-25 17:56:02 merged: 2018-05-30 09:40:56

  4. 23278 from @crovelli: Reduced ES alcareco size alca created: 2018-05-22 13:14:22 merged: 2018-05-28 15:04:21

  5. 23242 from @slava77: reduce cases of LogWarnings with InvalidHelix category in Pixel/Strip ClusterShape compatibility checks reconstruction created: 2018-05-18 10:56:16 merged: 2018-05-28 08:33:10

  6. 23227 from @cms-bph-trigger: Backporting merged PR 22955 to 10_1_X dqm created: 2018-05-17 10:40:03 merged: 2018-05-28 08:45:05

  7. 23225 from @slava77: suppress a to-do reminder in PFEGammaAlgo.cc from LogWarning to LogInfo reconstruction created: 2018-05-17 04:15:52 merged: 2018-05-17 09:44:22

  8. 23210 from @slava77: LogWarning->LogInfo in HLTObjectsMonitor for “objects have different ID” check (10_1_X) dqm hlt created: 2018-05-15 21:00:51 merged: 2018-05-17 09:02:28

  9. 23137 from @bsunanda: Run2-176 Backport PR # 23134 to update AlCaReco o/p collection alca created: 2018-05-03 21:12:10 merged: 2018-05-18 14:07:46

  10. 23127 from @CTPPS: CTPPS: DQM update (backport of #23025) dqm geometry created: 2018-05-03 12:49:22 merged: 2018-05-18 13:19:03

  11. 23118 from @christopheralanwest: Constrain HE TP depth sums to use only 11 bits l1 created: 2018-05-02 19:07:49 merged: 2018-05-17 20:18:00

  12. 23088 from @tanmaymudholkar: Changes to ECAL TTF4 DQM plots (for P5 production) dqm created: 2018-04-27 15:49:23 merged: 2018-05-17 20:13:11

  13. 22970 from @jfernan2: DT DQM data integrity and ML dqm created: 2018-04-16 08:43:31 merged: 2018-05-22 16:25:49

CMSDIST Changes between Tags REL/CMSSW_10_1_5/slc6_amd64_gcc630 and REL/CMSSW_10_1_6/slc6_amd64_gcc630:

compare to previous